Patents by Inventor Nathan Trent Josephsen

Nathan Trent Josephsen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10073677
    Abstract: Embodiments described herein are directed to mixed-radix carry-lookahead adders and methods performed thereby. The mixed-radix carry-lookahead adder includes an multiple carry-lookahead stages, where each stage may be of a different radix. Each stage operates on input bits, creating and implementing propagate and generate signals for each bit. The carry-lookahead stages also compute an XOR of the inputs that is forwarded to a final carry-lookahead stage. The elements of the initial and subsequent carry-lookahead stages are arranged such that each of the propagate and generate output signals passes through a minimal number of passive transmission lines. The final stage of the mixed-radix carry-lookahead adder includes an XOR logic gate configured to receive the generate output from an intermediate carry-lookahead stage and XOR the generate output received from the intermediate carry-lookahead stage with the computed XOR signal forwarded from the initial carry-lookahead stage to produce a sum of the input bits.
    Type: Grant
    Filed: June 16, 2015
    Date of Patent: September 11, 2018
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Nathan Trent Josephsen, Steven Brian Shauck
  • Patent number: 9761305
    Abstract: One embodiment describes a quantum memory system. The system includes an array controller that comprises a plurality of flux pumps configured to provide write currents in a write operation and read currents in a read operation with respect to a plurality of quantum memory cells, the array controller being configured to control timing associated with the write operation and the read operation in response to memory request signals based on application of the write currents and the read currents and based on recharging flux associated with the plurality of flux pumps.
    Type: Grant
    Filed: June 1, 2016
    Date of Patent: September 12, 2017
    Assignee: Northrop Grumman Systems Corporation
    Inventors: William Robert Reohr, Steven Brian Shauck, Donald Lynn Miller, Jeremy William Horner, Nathan Trent Josephsen
  • Publication number: 20170229167
    Abstract: One embodiment describes a quantum memory system. The system includes an array controller that comprises a plurality of flux pumps configured to provide write currents in a write operation and read currents in a read operation with respect to a plurality of quantum memory cells, the array controller being configured to control timing associated with the write operation and the read operation in response to memory request signals based on application of the write currents and the read currents and based on recharging flux associated with the plurality of flux pumps.
    Type: Application
    Filed: June 1, 2016
    Publication date: August 10, 2017
    Applicant: NORTHROP GRUMMAN SYSTEMS CORPORATION
    Inventors: WILLIAM ROBERT REOHR, STEVEN BRIAN SHAUCK, DONALD LYNN MILLER, JEREMY WILLIAM HORNER, NATHAN TRENT JOSEPHSEN
  • Publication number: 20160371058
    Abstract: Embodiments described herein are directed to mixed-radix carry-lookahead adders and methods performed thereby. The mixed-radix carry-lookahead adder includes an multiple carry-lookahead stages, where each stage may be of a different radix. Each stage operates on input bits, creating and implementing propagate and generate signals for each bit. The carry-lookahead stages also compute an XOR of the inputs that is forwarded to a final carry-lookahead stage. The elements of the initial and subsequent carry-lookahead stages are arranged such that each of the propagate and generate output signals passes through a minimal number of passive transmission lines. The final stage of the mixed-radix carry-lookahead adder includes an XOR logic gate configured to receive the generate output from an intermediate carry-lookahead stage and XOR the generate output received from the intermediate carry-lookahead stage with the computed XOR signal forwarded from the initial carry-lookahead stage to produce a sum of the input bits.
    Type: Application
    Filed: June 16, 2015
    Publication date: December 22, 2016
    Inventors: Nathan Trent Josephsen, Steven Brian Shauck
  • Patent number: 9384827
    Abstract: One embodiment describes a quantum memory system. The system includes a plurality of quantum memory cells arranged in an array of rows and columns. Each of the plurality of quantum memory cells can be configured to store a binary logic state in response to write currents in a write operation and configured to provide an indication of the binary logic state in response to read currents in a read operation. The system also includes an array controller comprising a plurality of flux pumps configured to provide the write currents and the read currents with respect to the rows and columns. The array controller can be configured to control timing associated with the write operation and the read operation in response to memory request signals based on application of the write currents and the read currents and based on recharging flux associated with the plurality of flux pumps.
    Type: Grant
    Filed: March 5, 2015
    Date of Patent: July 5, 2016
    Assignee: Northrop Grumman Systems Corporation
    Inventors: William Robert Reohr, Steven Brian Shauck, Donald Lynn Miller, Jeremy William Horner, Nathan Trent Josephsen