Patents by Inventor Nathen P. Edwards

Nathen P. Edwards has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5742823
    Abstract: In accordance with the invention, a processing system and method are provided which use assembly line procedures and substantially fixed or limited function process elements, as well as total object treatment of all data and elements of the system, so as to provide a system which produces certifiably correct results. All objects have specifications and account entries and are managed by specification identification and by date-time or instance identification for a single member of a particular specification class. All data carry this information as "co-values." According to another aspect of the invention, a processor system and process structure are configured to execute a particular job or process specified in a process network structure or directed graph, and the process continues according to the invention as a direct flow of data between processor elements, without interruption or intervention by control elements, until job completion or the occurrence of some error condition.
    Type: Grant
    Filed: January 17, 1996
    Date of Patent: April 21, 1998
    Assignees: Nathen P. Edwards, Estol C. Lamb, Campbell L. Stubbs
    Inventors: Nathen P. Edwards, Estol C. Lamb, Campbell L. Stubbs
  • Patent number: 4885627
    Abstract: A buried contact structure to decrease the spreading resistance of various circuit elements of semiconductor devices such as transistors and for reducing the resistance of polysilicon wires typically used in short lengths to connect the circuit elements to other metallic wires. The buried contact structure more specifically includes a phosphorous diffusion superimposed on the field implant which includes the source and/or drain of the transistor device. An overlayed layer of polysilicon is then disposed to make contact with the buried contact diffusion. The field implant used for the source and drain may, for example, be boron. The buried contact structure has a lower resistance than the field implant and therefore provides a lower resistance path for the device current.
    Type: Grant
    Filed: October 18, 1988
    Date of Patent: December 5, 1989
    Assignee: International Business Machines Corporation
    Inventor: Nathen P. Edwards