Abstract: There is provided with an etching method using an etching apparatus. Four arms can be positioned in a direction substantially from a center of the stage toward a peripheral portion with an angle difference of about 90°. Etchant is supplied to a first position nearest to the center of the object which is rotating, from a first etchant supply nozzle placed on a first arm. Etchant is further supplied to a second position second nearest to the center of the object, from a second etchant supply nozzle placed on a second arm. The second arm is substantially symmetrically positioned with respect to the first arm and the second arm has an angle difference of about 180° with respect to the first arm.

Abstract: A pressure type flow rate control apparatus is provided wherein flow rate of fluid passing through an orifice is computed as Qc=KP1 (where K is a proportionality constant) or as Qc=KP2m (P1?P2)n (where K is a proportionality constant, m and n constants) by using orifice upstream side pressure P1 and/or orifice downstream side pressure P2. A fluid passage between the downstream side of a control valve and a fluid supply pipe of the pressure type flow rate control apparatus comprises at least 2 fluid passages in parallel, and orifices having different flow rate characteristics are provided for each of these fluid passages, wherein fluid in a small flow quantity area flows to one orifice for flow control of fluid in the small flow quantity area, while fluid in a large flow quantity area flows to the other orifice for flow control of fluid in the large flow quantity area.

Abstract: A manufacturing method of a shower plate includes inserting a green body, a degreasing body, a temporary sintered body or a sintered body of a ceramic member, which has a plurality of gas discharge holes or gas flow holes, into a longitudinal hole of a green body, a degreasing body or a temporary sintered body of the shower plate, which has been formed by power ingredients; and sintering them simultaneously.

Abstract: A multilevel interconnect structure in a semiconductor device and methods for fabricating the same are described. The multilevel interconnect structure in the semiconductor device includes a first insulating layer formed on a semiconductor wafer, a Cu interconnect layer formed on the first insulating layer, a second insulating layer formed on the Cu interconnect layer, and a metal oxide layer formed at an interface between the Cu interconnect layer and the second insulating layer. The metal oxide layer is formed by immersion-plating a metal, such as Sn or Zn, on the Cu interconnect layer and then heat-treating the plated layer in an oxidizing atmosphere.