Patents by Inventor Nato Saiton

Nato Saiton has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20100032676
    Abstract: Provided is a manufacturing method for a power management semiconductor device or an analog semiconductor device both including a CMOS. According to the method, a substance having high thermal conductivity is additionally provided above a semiconductor region constituting a low impurity concentration drain region so as to expand the drain region, which contributes to a promotion of thermal conductivity (or thermal emission) in the drain region during a surge input and leads to suppression of local temperature increase, to thereby prevent thermal destruction. Therefore, it is possible to manufacture a power management semiconductor device or an analog semiconductor device with the extended possibility of transistor design.
    Type: Application
    Filed: August 4, 2009
    Publication date: February 11, 2010
    Inventors: Nato Saiton, Yuichiro Kitajima