Patents by Inventor Natsu Honda

Natsu Honda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11901007
    Abstract: Technology for applying a positive temperature coefficient (Tco) voltage to a control terminal of a dummy select transistor. The dummy select transistor resides on a NAND string having non-volatile memory cells and a regular select transistor. The dummy select transistor is typically ON (or conductive) during memory operations such as selected string program, read, and verify. In an aspect, the positive Tco voltage is applied to the control terminal of a dummy select transistor during a program operation. Applying the positive Tco voltage during program operations reduces or eliminates program disturb to the dummy select transistor. In some aspects, the dummy select transistor is used to generate a gate induced drain leakage (GIDL) current during an erase operation. In some aspects, the dummy select transistor is a depletion mode transistor.
    Type: Grant
    Filed: October 21, 2021
    Date of Patent: February 13, 2024
    Assignee: SanDisk Technologies LLC
    Inventors: Ken Oowada, Natsu Honda
  • Publication number: 20230128177
    Abstract: Technology is disclosed for applying a positive temperature coefficient (Tco) voltage to a control terminal of a dummy select transistor. The dummy select transistor resides on a NAND string having non-volatile memory cells and a regular select transistor. The dummy select transistor is typically ON (or conductive) during memory operations such as selected string program, read, and verify. In an aspect, the positive Tco voltage is applied to the control terminal of a dummy select transistor during a program operation. Applying the positive Tco voltage during program operations reduces or eliminates program disturb to the dummy select transistor. In some aspects, the dummy select transistor is used to generate a gate induced drain leakage (GIDL) current during an erase operation. In some aspects, the dummy select transistor is a depletion mode transistor.
    Type: Application
    Filed: October 21, 2021
    Publication date: April 27, 2023
    Applicant: SanDisk Technologies LLC
    Inventors: Ken Oowada, Natsu Honda