Abstract: A control circuit of a semiconductor memory device performs a write operation on a memory cell transistor of the semiconductor memory device by performing a first pulse application operation of lowering a threshold voltage of the memory cell transistor, a precharge operation, and then a second pulse application operation. In the precharge operation, in a state in which first and second select transistors connected to the memory cell transistor are turned on, a bit line connected to the memory cell transistor is charged by applying a ground voltage to a word line connected to a gate of the memory cell transistor and applying a voltage higher than the ground voltage to a source line. In the second pulse application operation, in a state in which the first select transistor is turned on and the second select transistor is turned off, a program voltage is applied to the word line.

Abstract: The invention is a Fe—Ni alloy material comprising Ni: 26–37 wt %, Si: 0.001–0.2 wt %, Mn: 0.01–0.6 wt %, Al: 0.0001–0.003 wt %, Mg: not more than 0.001 wt %, Ca: not more than 0.001 wt % and the reminder being Fe and inevitable impurities, and containing not more than 0.02 wt % of one or more MnO—SiO2—Al2O3 inclusion, SiO2 inclusion and MgO—Al2O3 inclusion insoluble in an aqueous solution of ferric chloride, and is to provide electronic materials for shadow mask and the like having a good hole shape in an etching treatment and a high quality.

Abstract: The inv ntion is a Fe—Ni alloy mat rial comprising Ni: 26-37 wt %, Si: 0.001-0.2 wt %, Mn: 0.01-0.6 wt %, Al: 0.0001-0.003 wt %, Mg: not more than 0.001 wt %, Ca: not more than 0.001 wt % and the reminder being Fe and inevitable impurities, and containing not more than 0.02 wt % of one or more MnO—SiO2—Al2O3 inclusion, SiO2 inclusion and MgO—Al2O3 inclusion insoluble in an aqueous solution of ferric chloride, and is to provide electronic materials for shadow mask and the like having a good hole shape in an etching treatment and a high quality.