Patents by Inventor NATSUKO KITAJO

NATSUKO KITAJO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10887985
    Abstract: A wiring substrate includes a pad, an insulation layer that covers the pad, and a via wiring extending through the insulation layer and connected to the pad. The via wiring includes a first via portion, which has a diameter that is decreased from an upper surface of the insulation layer toward the pad, and a second via portion, which has a diameter that is increased from a lower end of the first via portion toward the pad. The diameter of the second via portion at an upper surface of the pad is larger than the diameter of the first via portion at the upper surface of the insulation layer.
    Type: Grant
    Filed: March 29, 2019
    Date of Patent: January 5, 2021
    Inventors: Natsuko Kitajo, Yuji Yukiiri, Izumi Tanaka
  • Patent number: 10854475
    Abstract: A wiring substrate includes: a first insulating layer; a plurality of wiring patterns formed on one surface of the first insulating layer; a dummy pattern formed, on the one surface of the first insulating layer, between the nearby wiring patterns; and a second insulating layer made of resin and formed on the one surface of the first insulating layer so as to cover the nearby wiring patterns and the dummy pattern, wherein the dummy pattern is a dot pattern arranged at a center portion between the nearby wiring patterns, and wherein a height of at least one dot constituting the dummy pattern is lower than heights of the nearby wiring patterns.
    Type: Grant
    Filed: December 6, 2018
    Date of Patent: December 1, 2020
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventor: Natsuko Kitajo
  • Publication number: 20190230791
    Abstract: A wiring substrate includes a pad, an insulation layer that covers the pad, and a via wiring extending through the insulation layer and connected to the pad. The via wiring includes a first via portion, which has a diameter that is decreased from an upper surface of the insulation layer toward the pad, and a second via portion, which has a diameter that is increased from a lower end of the first via portion toward the pad. The diameter of the second via portion at an upper surface of the pad is larger than the diameter of the first via portion at the upper surface of the insulation layer.
    Type: Application
    Filed: March 29, 2019
    Publication date: July 25, 2019
    Inventors: Natsuko KITAJO, Yuji YUKIIRI, Izumi TANAKA
  • Publication number: 20190198433
    Abstract: A wiring substrate includes: a first insulating layer; a plurality of wiring patterns formed on one surface of the first insulating layer; a dummy pattern formed, on the one surface of the first insulating layer, between the nearby wiring patterns; and a second insulating layer made of resin and formed on the one surface of the first insulating layer so as to cover the nearby wiring patterns and the dummy pattern, wherein the dummy pattern is a dot pattern arranged at a center portion between the nearby wiring patterns, and wherein a height of at least one dot constituting the dummy pattern is lower than heights of the nearby wiring patterns.
    Type: Application
    Filed: December 6, 2018
    Publication date: June 27, 2019
    Inventor: Natsuko KITAJO
  • Patent number: 10306759
    Abstract: A wiring substrate includes a pad, an insulation layer that covers the pad, and a via wiring extending through the insulation layer and connected to the pad. The via wiring includes a first via portion, which has a diameter that is decreased from an upper surface of the insulation layer toward the pad, and a second via portion, which has a diameter that is increased from a lower end of the first via portion toward the pad. The diameter of the second via portion at an upper surface of the pad is larger than the diameter of the first via portion at the upper surface of the insulation layer.
    Type: Grant
    Filed: December 18, 2017
    Date of Patent: May 28, 2019
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Natsuko Kitajo, Yuji Yukiiri, Izumi Tanaka
  • Publication number: 20180184521
    Abstract: A wiring substrate includes a pad, an insulation layer that covers the pad, and a via wiring extending through the insulation layer and connected to the pad. The via wiring includes a first via portion, which has a diameter that is decreased from an upper surface of the insulation layer toward the pad, and a second via portion, which has a diameter that is increased from a lower end of the first via portion toward the pad. The diameter of the second via portion at an upper surface of the pad is larger than the diameter of the first via portion at the upper surface of the insulation layer.
    Type: Application
    Filed: December 18, 2017
    Publication date: June 28, 2018
    Inventors: Natsuko Kitajo, Yuji Yukiiri, Izumi Tanaka
  • Patent number: 9711461
    Abstract: A wiring substrate includes first through holes extending through an insulation layer, first via wirings formed in the first through holes, a conductive pattern connected to the first via wirings, recesses formed in the first via wirings, and a protective insulation layer covering the conductive pattern and the first via wirings. The first via wirings, the conductive pattern, the recesses, and the protective insulation layer form an identification mark identifiable as a particular shape including a character or a symbol. Each recess is defined by an upper surface of the corresponding first via wiring and includes a curved side wall and a bottom wall that is located at a lower position than an upper surface of the conductive pattern. The protective insulation layer is thicker over the first via wirings than over the conductive pattern.
    Type: Grant
    Filed: October 20, 2016
    Date of Patent: July 18, 2017
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Natsuko Kitajo, Yuji Yukiiri, Izumi Tanaka
  • Publication number: 20170141044
    Abstract: A wiring substrate includes first through holes extending through an insulation layer, first via wirings formed in the first through holes, a conductive pattern connected to the first via wirings, recesses formed in the first via wirings, and a protective insulation layer covering the conductive pattern and the first via wirings. The first via wirings, the conductive pattern, the recesses, and the protective insulation layer form an identification mark identifiable as a particular shape including a character or a symbol. Each recess is defined by an upper surface of the corresponding first via wiring and includes a curved side wall and a bottom wall that is located at a lower position than an upper surface of the conductive pattern. The protective insulation layer is thicker over the first via wirings than over the conductive pattern.
    Type: Application
    Filed: October 20, 2016
    Publication date: May 18, 2017
    Inventors: NATSUKO KITAJO, YUJI YUKIIRI, IZUMI TANAKA