Patents by Inventor Natsuro Tanaka

Natsuro Tanaka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20020026397
    Abstract: Card information is managed in a data center interposed between a plurality of financial institutions which issue cards and users which use the issued cards. The data center registers card information including card numbers and card status information into a database correspondingly to user IDs established in advance. The data center checks a user ID transmitted from a terminal operated by corresponding one of the users with each of user IDs registered in the database. As a result of the checking, if there is a registered user ID coinciding with the transmitted user ID, the data center invalidates card status information corresponding to at least one card selected by the user out of card information of the user. Then, the data center transmits a request to invalidate the selected card to a corresponding financial institution which has issued the selected card while designating card number of the card.
    Type: Application
    Filed: March 1, 2001
    Publication date: February 28, 2002
    Inventors: Kaname Ieta, Natsuro Tanaka, Toshinori Obata
  • Patent number: 5652833
    Abstract: In a change-over control method for a parallel processor system including a current processor group having a plurality of processors and a network connecting the processors to each other and a standby processor group configured in the same way as for the current processor group, a processor control section is disposed in the parallel processor system, and a monitor processor is arranged for each of the current and standby processor groups. A faulty processor ratio determined according to the amount of job processing is set to the processor control section. On receiving a report notifying occurrence of a failure in a processor from the monitor processor disposed in the current processor group, the processor control section determines a ratio of failed processors in the current processor group.
    Type: Grant
    Filed: March 9, 1995
    Date of Patent: July 29, 1997
    Assignees: Hitachi, Ltd., Hitachi Information Network, Ltd., Hitachi System Engineering, Ltd.
    Inventors: Mitsuyoshi Takizawa, Akinori Minamisawa, Yasushi Meguro, Natsuro Tanaka
  • Patent number: 5386297
    Abstract: A mail system comprises a message handling processor for storing code data and image data, a code data terminal for generating code data, an image data terminal for generating image data, and a code/image exchange unit for combining the code data and the image data into image data. The message handling processor converts the code data message from the code data terminal to image data by the exchange unit and combines the combined image data and the image data from the image data terminal to produce image data to be outputted to another image data terminal.
    Type: Grant
    Filed: October 13, 1993
    Date of Patent: January 31, 1995
    Assignees: Hitachi, Ltd., Hitachi Software Engineering Co., Ltd.
    Inventors: Natsuro Tanaka, Tokuji Tamada, Yoshihiro Nakajima