Patents by Inventor Natsuya Ishikawa

Natsuya Ishikawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6946747
    Abstract: A semiconductor device of the MCM type capable of high-speed operation and low power consumption and its manufacturing method are provided. A plurality of semiconductor chips, each having an internal circuit as well as an external connection circuit drawn from the internal circuit, are mounted on the same supporting substrate of this semiconductor device. Semiconductor chips are connected with each other, not by way of the external connection circuits, but directly at a portion between the internal circuits through wiring. This wiring is patterned on an insulating film provided on the supporting substrate and covers the semiconductor chips. Accordingly, through connection holes formed on the insulating film, connection can be established to the internal circuits or the wiring can be formed on the supporting substrate side. If the wiring is formed on the supporting substrate side, the semiconductor chips are to be mounted facing down relative to the supporting substrate.
    Type: Grant
    Filed: March 12, 2003
    Date of Patent: September 20, 2005
    Assignee: Sony Corporation
    Inventors: Yukari Mori, Takayuki Ezaki, Teruo Hirayama, Naoto Sasaki, Hiroshi Ozaki, Natsuya Ishikawa
  • Publication number: 20020064930
    Abstract: Providing a method for forming a solder bump and a process for fabricating a semiconductor device, which can form an optimum solder bump for IC chips at a low cost. An opening portion is formed in an inexpensive photoresist having a low heat resistance formed on a wafer, and only a solder paste filling the opening portion is partly heated by a laser beam to form a solder bump. Thus, there can be provided a method for forming a solder bump, which is advantageous not only in that the predetermined amount of a solder bump can be formed in the opening portion formed with a high accuracy without dispersion, but also in that the cost can be lowered because of the use of an inexpensive photoresist.
    Type: Application
    Filed: July 10, 2001
    Publication date: May 30, 2002
    Inventor: Natsuya Ishikawa
  • Patent number: 5849631
    Abstract: A method of manufacturing a semiconductor device includes the steps of: patterning a first passivation film on a semiconductor substrate; patterning a ball limiting metal film; patterning a second passivation film; performing a heat-treatment for hardening the second passivation film and annealing the ball limiting metal film; patterning a bump forming metal film; and wet-back processing the bump forming metal film. In this method, the heat-treatment may be performed in an atmosphere having an oxygen concentration of 50 ppm or less at a temperature of from 300.degree. to 400.degree. C. for 10 to 30 minutes. Additionally, at least one of the first and second passivation films may be a polyimide film, and the ball limiting metal film may has a three layer structure of a Ti layer, a Cu layer and an Au layer laminated from the bottom in this order.
    Type: Grant
    Filed: July 17, 1996
    Date of Patent: December 15, 1998
    Assignee: Sony Corporation
    Inventors: Natsuya Ishikawa, Kiyoshi Hasegawa, Masaki Hatano