Abstract: Jumboblocks (JBs) having an uncorrectable error correction code (UECC) error are linked to a bad block in a storage address table (SAT) in order to optimize read and write operations. Bad blocks are designated as a bad block during a manufacturing process or associated with a write uncorrectable error. When a JB is identified as having the UECC error, the controller updates a corresponding mapping of the SAT to point to a bad block, where each JB having the UECC error points to the bad block. When a read command is received by the controller for the data of the JB having the UECC error, the controller scans the SAT, determines, from the SAT, that the JB identification points to the bad block, and returns a UECC message to the requester of the data of the JB having the UECC error.

Abstract: A controller maintains logical block address (LBA) to physical block address (PBA) mappings as mSets in a storage address table (SAT). Because the SAT may include many mappings, and, consequently, have a large size, the SAT may be stored in a distanced memory from the controller, such as a non-volatile memory device of the data storage device or a host memory buffer of a host device that is coupled to the data storage device. In order to optimize performance, a portion of the SAT may be stored as a compressed address table (CAT) in an internal memory of the controller or another volatile memory of the data storage device. During operation, the controller maintains an active range of mSets in the CAT by adding mSets to the CAT based on whether the LBA is sequential to the active range and a hit count of the active range.

Abstract: A controller maintains logical block address (LBA) to physical block address (PBA) mappings as mSets in a storage address table (SAT). Because the SAT may include many mappings, and, consequently, have a large size, the SAT may be stored in a distanced memory from the controller, such as a non-volatile memory device of the data storage device or a host memory buffer of a host device that is coupled to the data storage device. In order to optimize performance, a portion of the SAT may be stored as a compressed address table (CAT) in an internal memory of the controller or another volatile memory of the data storage device. During operation, the controller maintains an active range of mSets in the CAT by adding mSets to the CAT based on whether the LBA is sequential to the active range and a hit count of the active range.

Abstract: Jumboblocks (JBs) having an uncorrectable error correction code (UECC) error are linked to a bad block in a storage address table (SAT) in order to optimize read and write operations. Bad blocks are designated as a bad block during a manufacturing process or associated with a write uncorrectable error. When a JB is identified as having the UECC error, the controller updates a corresponding mapping of the SAT to point to a bad block, where each JB having the UECC error points to the bad block. When a read command is received by the controller for the data of the JB having the UECC error, the controller scans the SAT, determines, from the SAT, that the JB identification points to the bad block, and returns a UECC message to the requester of the data of the JB having the UECC error.

Abstract: A controller maintains logical block address (LBA) to physical block address (PBA) mappings as mSets in a storage address table (SAT). Because the SAT may include many mappings, and, consequently, have a large size, the SAT may be stored in a distanced memory from the controller, such as a non-volatile memory device of the data storage device or a host memory buffer of a host device that is coupled to the data storage device. In order to optimize performance, a portion of the SAT may be stored as a compressed address table (CAT) in an internal memory of the controller or another volatile memory of the data storage device. During operation, the controller maintains an active range of mSets in the CAT by adding mSets to the CAT based on whether the LBA is sequential to the active range and a hit count of the active range.