Abstract: Systems, methods, and computer program products for generating job value predictions by a trained model for a tenant include receiving live data associated with a tenant, where the live data includes information associated with a job to be performed by the tenant. A trained model associated with the tenant is retrieved, where the trained model is configured to generate a job value prediction for the job to be performed. The live data is preprocessed to obtain a set of features associated with the job, the set of features consumable by the trained model, and the trained model is applied to the set of features to generate the job value prediction for the job to be performed by the tenant.

Abstract: Systems, methods, and computer program products for generating job value predictions by a trained model for a tenant include receiving live data associated with a tenant, where the live data includes information associated with a job to be performed by the tenant. A trained model associated with the tenant is retrieved, where the trained model is configured to generate a job value prediction for the job to be performed. The live data is preprocessed to obtain a set of features associated with the job, the set of features consumable by the trained model, and the trained model is applied to the set of features to generate the job value prediction for the job to be performed by the tenant.

Abstract: A method of placing circuit elements of a partitioned circuit design on a target programmable logic device (PLD) can include mapping circuit elements of the circuit design to corresponding partitions of the circuit design, selecting a circuit element of the circuit design, and selecting a candidate location within a logic boundary on the target PLD. The method also can include validating the candidate location for the selected circuit element, at least in part, according to whether the selected circuit element belongs to a same partition of the circuit design as at least one other circuit element already placed within the logic boundary. The selected circuit element can be selectively placed at the candidate location according to the validation.