Patents by Inventor Navaz Lulla

Navaz Lulla has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Circuit for generating silicon ID for PLDS
    Patent number: 6922820
    Abstract: An apparatus comprising a circuit configured to select one of a number of identification (ID) codes in response to a voltage level at one or more pins.
    Type: Grant
    Filed: October 12, 2000
    Date of Patent: July 26, 2005
    Assignee: Cypress Semiconductor Corp.
    Inventors: Navaz Lulla, Anup Nayak
  • JTAG instruction register and decoder for PLDS
    Patent number: 6804802
    Abstract: An apparatus comprising a synchronous circuit configured to (i) shift a JTAG instruction signal in response to a first control signal, (ii) decode the JTAG instruction signal while the JTAG instruction signal is shifted and (iii) latch the decoded JTAG instruction signal in response to a second control signal.
    Type: Grant
    Filed: June 22, 2000
    Date of Patent: October 12, 2004
    Assignee: Cypress Semiconductor Corp.
    Inventors: Navaz Lulla, Anup Nayak
  • Architecture and logic to control a device without a JTAG port through a device with a JTAG port
    Patent number: 6757844
    Abstract: An apparatus comprising a first circuit comprising a JTAG port and a second port. A JTAG non-compliant circuit may be controlled by the JTAG port when connected to the second port.
    Type: Grant
    Filed: October 25, 2000
    Date of Patent: June 29, 2004
    Assignee: Cypress Semiconductor Corp.
    Inventors: Navaz Lulla, Anup Nayak, Harish Dangat, Richard L. Stanton
  • PLD configuration port architecture and logic
    Patent number: 6748456
    Abstract: A programmable logic device (PLD) comprising a configuration controller. The configuration controller may be configured to (i) retrieve data and (ii) program a number of configuration bits of the PLD in response to the data.
    Type: Grant
    Filed: September 29, 2000
    Date of Patent: June 8, 2004
    Assignee: Cypress Semiconductor Corp.
    Inventors: Richard L. Stanton, Anup Nayak, Navaz Lulla, Harish Dangat
  • PLD configuration architecture
    Patent number: 6567970
    Abstract: An apparatus comprising one or more configuration blocks. The configuration blocks (i) may comprise a number of configuration elements and (ii) may be configured to initiate reading or writing of the configuration elements in response to a control input.
    Type: Grant
    Filed: December 27, 2000
    Date of Patent: May 20, 2003
    Assignee: Cypress Semiconductor Corp.
    Inventors: Anup Nayak, Navaz Lulla, Ramin Ighani, Rajiv Nema