Patents by Inventor Naveen Cherukuri

Naveen Cherukuri has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150081921
    Abstract: Systems and methods of managing a link provide for receiving a remote width capability during a link initialization, the remote width capability corresponding to a remote port. A link between a local port and the remote port is operated at a plurality of link widths in accordance with the remote width capability.
    Type: Application
    Filed: November 26, 2014
    Publication date: March 19, 2015
    Inventors: Naveen Cherukuri, Aaron T. Spink, Phanindra Mannava, Tim Frodsham, Jeffrey R. Wilcox, Sanjay Dabral, David Dunning, Theodore Z. Schoenborn
  • Publication number: 20150074440
    Abstract: Methods and apparatus relating to link power savings with state retention are described. In one embodiment, one or more components of two agents coupled via a serial link are turned off during idle periods while retaining link state in each agent. Other embodiments are also disclosed.
    Type: Application
    Filed: July 1, 2014
    Publication date: March 12, 2015
    Inventors: NAVEEN CHERUKURI, JEFFREY WILCOX, VENKATRAMAN IYER, SELIM BILGIN, DAVID S. DUNNING, TIM FRODSHAM, THEODORE Z. SCHOENBORN, SANJAY DABRAL
  • Patent number: 8914541
    Abstract: Systems and methods of managing a link provide for receiving a remote width capability during a link initialization, the remote width capability corresponding to a remote port. A link between a local port and the remote port is operated at a plurality of link widths in accordance with the remote width capability.
    Type: Grant
    Filed: September 22, 2011
    Date of Patent: December 16, 2014
    Assignee: Intel Corporation
    Inventors: Naveen Cherukuri, Aaron T. Spink, Phanindra Mannaya, Tim Frodsham, Jeffrey R. Wilcox, Sanjay Dabral, David Dunning, Theodore Z. Schoenborn
  • Patent number: 8831666
    Abstract: Methods and apparatus relating to link power savings with state retention are described. In one embodiment, one or more components of two agents coupled via a serial link are turned off during idle periods while retaining link state in each agent. Other embodiments are also disclosed.
    Type: Grant
    Filed: June 30, 2009
    Date of Patent: September 9, 2014
    Assignee: Intel Corporation
    Inventors: Naveen Cherukuri, Jeffrey Wilcox, Venkatraman Iyer, Selim Bilgin, David D. Dunning, Robin Tim Frodsham, Theodore Z. Schoenborn, Sanjay Dabral
  • Publication number: 20140156892
    Abstract: A link latency management for a high-speed point-to-point network (pTp) is described The link latency management facilitates calculating latency of a serial interface by tracking a round trip delay of a header that contains latency information. Therefore, the link latency management facilitates testers, logic analyzers, or test devices to accurately measure link latency for a point-to-point architecture utilizing a serial interface.
    Type: Application
    Filed: June 10, 2013
    Publication date: June 5, 2014
    Inventors: Tim Frodsham, Michael J. Tripp, David J. O'Brien, Navada Herur Muraleedhara, Naveen Cherukuri, Sanjay Dabral, David S. Dunning, Theodore Z. Schoenborn
  • Publication number: 20140112145
    Abstract: A method and system to avoid multi-ring deadlock. The method includes removing a message on a multi-ring interconnect either with a ring connector associated with the target of the message or by the message's source station such that the message travels no more than one time around the slotted ring interconnect before its removal. The method may also be applied to single ring networks for congestion control.
    Type: Application
    Filed: December 27, 2013
    Publication date: April 24, 2014
    Inventors: Ching-Tsun Chou, Naveen Cherukuri
  • Patent number: 8693319
    Abstract: A method and system to avoid multi-ring deadlock. The method includes removing a message on a multi-ring interconnect either with a ring connector associated with the target of the message or by the message's source station such that the message travels no more than one time around the slotted ring interconnect before its removal. The method may also be applied to single ring networks for congestion control.
    Type: Grant
    Filed: September 25, 2008
    Date of Patent: April 8, 2014
    Assignee: Intel Corporation
    Inventors: Ching-Tsun Chou, Naveen Cherukuri
  • Patent number: 8683136
    Abstract: An apparatus and method are described for performing history-based prefetching. For example a method according to one embodiment comprises: determining if a previous access signature exists in memory for a memory page associated with a current stream; if the previous access signature exists, reading the previous access signature from memory; and issuing prefetch operations using the previous access signature.
    Type: Grant
    Filed: December 22, 2010
    Date of Patent: March 25, 2014
    Assignee: Intel Corporation
    Inventors: Naveen Cherukuri, Mani Azimi
  • Publication number: 20140006714
    Abstract: An apparatus of an aspect includes a plurality of cores. The plurality of cores are logically grouped into a plurality of clusters. A cluster sharing map-based coherence directory is coupled with the plurality of cores and is to track sharing of data among the plurality of cores. The cluster sharing map-based coherence directory includes a tag array to store corresponding pairs of addresses and cluster identifiers. Each of the addresses is to identify data. Each of the cluster identifiers is to identify one of the clusters. The cluster sharing map-based coherence directory also includes a cluster sharing map array to store cluster sharing maps. Each of the cluster sharing maps corresponds to one of the pairs of addresses and cluster identifiers. Each of the cluster sharing maps is to indicate intra-cluster sharing of data identified by the corresponding address within a cluster identified by the corresponding cluster identifier.
    Type: Application
    Filed: June 29, 2012
    Publication date: January 2, 2014
    Inventors: Naveen Cherukuri, Mani Azimi
  • Publication number: 20120166733
    Abstract: An apparatus and method are described for performing history-based prefetching. For example a method according to one embodiment comprises: determining if a previous access signature exists in memory for a memory page associated with a current stream; if the previous access signature exists, reading the previous access signature from memory; and issuing prefetch operations using the previous access signature.
    Type: Application
    Filed: December 22, 2010
    Publication date: June 28, 2012
    Inventors: Naveen Cherukuri, Mani Azimi
  • Patent number: 8204067
    Abstract: A technique to perform virtualization of lanes within a common system interface (CSI) link. More particularly, embodiments described herein relate to virtualizing interconnective paths between two or more electronic devices residing in an electronic network.
    Type: Grant
    Filed: July 13, 2004
    Date of Patent: June 19, 2012
    Assignee: Intel Corporation
    Inventors: Naveen Cherukuri, Jeffrey R. Wilcox, Sanjay Dabral, David S. Dunning, Tim Frodsham, Theodore Z. Schoenborn
  • Publication number: 20120011276
    Abstract: Systems and methods of managing a link provide for receiving a remote width capability during a link initialization, the remote width capability corresponding to a remote port. A link between a local port and the remote port is operated at a plurality of link widths in accordance with the remote width capability.
    Type: Application
    Filed: September 22, 2011
    Publication date: January 12, 2012
    Inventors: Naveen Cherukuri, Aaron T. Spink, Phanindra Mannaya, Tim Frodsham, Jeffrey R. Wilcox, Sanjay Dabral, David Dunning, Theodore Z. Schoenborn
  • Publication number: 20110320762
    Abstract: In one embodiment, the present invention includes a processor comprising a page tracker buffer (PTB), the PTB including a plurality of entries to store an address to a cache page and to store a signature to track an access to each cache line of the cache page, and a PTB handler, the PTB handler to load entries into the PTB and to update the signature. Other embodiments are also described and claimed.
    Type: Application
    Filed: June 23, 2010
    Publication date: December 29, 2011
    Inventors: Livio B. Soares, Naveen Cherukuri, Akhilesh Kumar, Mani Azimi
  • Patent number: 8046488
    Abstract: Systems and methods of managing a link provide for receiving a remote width capability during a link initialization, the remote width capability corresponding to a remote port. A link between a local port and the remote port is operated at a plurality of link widths in accordance with the remote width capability.
    Type: Grant
    Filed: May 21, 2004
    Date of Patent: October 25, 2011
    Assignee: Intel Corporation
    Inventors: Naveen Cherukuri, Aaron T. Spink, Phanindra Mannava, Tim Frodsham, Jeffrey R. Wilcox, Sanjay Dabral, David Dunning, Theodore Z. Schoenborn
  • Patent number: 7979234
    Abstract: A scheme to facilitate deterministic thermal management by having either device connected via a link to generate a thermal management request based on one device's thermal capability and the present conditions. The request is transmitted over the link to the other device with a specific sleep period. Consequently, the receiving device responds with an acknowledgement within a pre-configured or pre-agreed response time.
    Type: Grant
    Filed: January 5, 2009
    Date of Patent: July 12, 2011
    Assignee: Intel Corporation
    Inventors: Seh W. Kwa, Animesh Mishra, Naveen Cherukuri
  • Patent number: 7965741
    Abstract: A predetermined network packet is utilized for power reduction in either or both of a transmitter and receiver when information is not needed. Upon detection of the predetermined network packet type, various portions of the transmitter and/or receiver may be clock gated or powered down.
    Type: Grant
    Filed: July 29, 2009
    Date of Patent: June 21, 2011
    Assignee: Intel Corporation
    Inventors: Tim Frodsham, Naveen Cherukuri, Sanjay Darbal, David S. Dunning, Theodore Z. Schoenborn, Lakshminarayan Krishnamurty, Aaron T. Spink
  • Publication number: 20110145506
    Abstract: In one embodiment, the present invention includes a cache memory including cache lines that each have a tag field including a state portion to store a cache coherency state of data stored in the line and a weight portion to store a weight corresponding to a relative importance of the data. In various implementations, the weight can be based on the cache coherency state and a recency of usage of the data. Other embodiments are described and claimed.
    Type: Application
    Filed: December 16, 2009
    Publication date: June 16, 2011
    Inventors: Naveen Cherukuri, Dennis W. Brzezinski, Ioannis T. Schoinas, Anahita Shayesteh, Akhilesh Kumar, Mani Azimi
  • Patent number: 7957428
    Abstract: Embodiments of the invention provide an algorithm for dividing a link into one or more reduced-width links. For one embodiment of the invention, a multiplexing scheme is employed to effect a bit transmission order required by a particular cyclic redundancy check. The multiplexed output bits are then swizzled on-chip to reduce on-board routing congestion.
    Type: Grant
    Filed: May 21, 2004
    Date of Patent: June 7, 2011
    Assignee: Intel Corporation
    Inventors: Maurice B. Steinman, Rahul R. Shah, Naveen Cherukuri, Aaron T. Spink, Allen J. Baum, Sanjay Dabral, Tim Frodsham, David S. Dunning, Theodore Z. Schoenborn
  • Publication number: 20100330927
    Abstract: Methods and apparatus relating to link power savings with state retention are described. In one embodiment, one or more components of two agents coupled via a serial link are turned off during idle periods while retaining link state in each agent. Other embodiments are also disclosed.
    Type: Application
    Filed: June 30, 2009
    Publication date: December 30, 2010
    Inventors: Naveen Cherukuri, Jeffrey Wilcox, Venkatraman Iyer, Selim Bilgin, David D. Dunning, Robin Tim Frodsham, Theodore Z. Schoenborn, Sanjay Dabral
  • Patent number: 7844767
    Abstract: A technique is described by which two link agents with ports coupled together using a point-to-point interconnect in a system exchange their link width support capabilities and negotiate a link width that is mutually agreeable. The interconnect between each pair of agents comprises a pair of uni-directional links having multiple electrical wires, or lanes, where one link is used by a first agent to transmit data to a second agent and another link is used by the second agent to transmit data to the first agent.
    Type: Grant
    Filed: May 21, 2004
    Date of Patent: November 30, 2010
    Assignee: Intel Corporation
    Inventors: Naveen Cherukuri, Sanjay Dabral, David S. Dunning, Tim Frodsham, Theodore Z. Schoenborn, Rahul R. Shah, Maurice B. Steinman