Patents by Inventor Naveen G

Naveen G has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240107433
    Abstract: The present application relates to apparatus, systems, and methods to provide a service based interface in wireless communication systems.
    Type: Application
    Filed: September 14, 2023
    Publication date: March 28, 2024
    Applicant: Apple Inc.
    Inventors: Sudeep Manithara Vamanan, Alexander Sirotkin, Behrouz Aghili, Haijing Hu, Krisztian Kiss, Naveen Kumar R. Palle Venkata, Peng Cheng, Ralf Rossbach, Vivek G. Gupta, Yuqin Chen, Zhibin Wu
  • Publication number: 20240076239
    Abstract: Stucco-cement compositions with a shortened drying time, lighter weight, high strength and reduced expansion, the compositions comprising expanded perlite and preferably also calcium aluminate cement and/or calcium sulfoaluminate cement, and methods for making and using these compositions, including pourable and/or pumpable floor underlayment slurries and methods for forming high strength underlayment on different substrates.
    Type: Application
    Filed: March 2, 2023
    Publication date: March 7, 2024
    Inventors: Sriram K. Valluri, David D. Pelot, Naveen Punati, Derik Harlow, Scott Cimaglio, Karl G. Niessner
  • Patent number: 11422173
    Abstract: A Power Management Controller (PMC) which manages power states of a platform, informs a power accumulator device to start measuring the platform power during entry into the low power state (e.g., S0iX). The power accumulator device starts measuring the power until a stop message comes from the PMC. The PMC on detection of any wake event initiates a stop message to the power accumulator device. Once an operating system (OS) context is restored, software can read the measured data from the power accumulator device. The measured data is accessible to a host software using standard software application programming interface (API) and can be used to influence the power policies of the system.
    Type: Grant
    Filed: December 1, 2020
    Date of Patent: August 23, 2022
    Assignee: Intel Corporation
    Inventors: Sriram Ranganathan, Naveen G, Pannerkumar Rajagopal, Govindaraj Gettimalli, Javahar Ragothaman
  • Patent number: 11327547
    Abstract: Technology for a system operable to extend a level of processor performance is disclosed. The system can comprise a power source connected to a platform voltage regulator (VR) and one or more processors and configured to provide an input power to the platform VR. The system can further comprise the platform VR connected to a peripheral interface and the one or more processors and configured to power the peripheral interface and send a power good signal to the one or more processors. The system can further comprise the peripheral interface connected to the platform VR and the one or more processors and configured to connect to a peripheral device and send a signal to the one or more processors when a peripheral interface connection state is identified as connected.
    Type: Grant
    Filed: October 12, 2020
    Date of Patent: May 10, 2022
    Assignee: Intel Corporation
    Inventors: Naveen G, Bharath Kumar
  • Patent number: 11286209
    Abstract: A method of manufacturing a ceramic matrix composite component may include introducing a gaseous precursor into an inlet portion of a chamber that houses a porous preform and introducing a gaseous mitigation agent into an outlet portion of the chamber that is downstream of the inlet portion of the chamber. The gaseous precursor may include methyltrichlorosilane (MTS) and the gaseous mitigation agent may include hydrogen gas. The introduction of the gaseous precursor may result in densification of the porous preform(s) and the introduction of the gaseous mitigation agent may shift the reaction equilibrium to disfavor the formation of harmful and/or pyrophoric byproduct deposits, which can accumulate in an exhaust conduit 340 of the system.
    Type: Grant
    Filed: June 5, 2020
    Date of Patent: March 29, 2022
    Assignee: Goodrich Corporation
    Inventors: Ying She, Naveen G. Menon, Zissis A. Dardas, Thomas P. Filburn
  • Publication number: 20220085718
    Abstract: A buck-boost converter having dual-folded bootstrap for driver metal oxide semiconductor (DrMOS) device that, in addition to the traditional bootstrap capacitors, include folded bootstrap capacitors that cross-couple inductor nodes to the two sets of DrMOS switches. The DrMOS switches can be n-type or p-type, and can be replaced with driver Gallium Nitride (DrGaN) devices.
    Type: Application
    Filed: September 16, 2020
    Publication date: March 17, 2022
    Applicant: Intel Corporation
    Inventors: Jagadish Vasudeva Singh, Ankur Mishra, Naveen G, Arvind S
  • Patent number: 11176124
    Abstract: A set of first results from a first query are received. Using a natural language processing technique, a set of second results using a second query having at least a portion of the first query and at least a portion of set of first results are generated, wherein the natural language processing technique comprises a machine learning model configured to analyze the set of first results. The set of second results are scored based upon a semantic comparison of the set of first results, the second query, and the set of second results. Using the scored set of the second results, a set of processed results are generated.
    Type: Grant
    Filed: December 18, 2018
    Date of Patent: November 16, 2021
    Assignee: International Business Machines Corporation
    Inventors: Naveen G. Balani, Amit P. Bohra, Abhishek Shrivastava
  • Publication number: 20210349134
    Abstract: A Power Management Controller (PMC) which manages power states of a platform, informs a power accumulator device to start measuring the platform power during entry into the low power state (e.g., S0iX). The power accumulator device starts measuring the power until a stop message comes from the PMC. The PMC on detection of any wake event initiates a stop message to the power accumulator device. Once an operating system (OS) context is restored, software can read the measured data from the power accumulator device. The measured data is accessible to a host software using standard software application programming interface (API) and can be used to influence the power policies of the system.
    Type: Application
    Filed: December 1, 2020
    Publication date: November 11, 2021
    Applicant: Intel Corporation
    Inventors: Sriram Ranganathan, Naveen G, Pannerkumar Rajagopal, Govindaraj Gettimalli, Javahar Ragothaman
  • Patent number: 10975467
    Abstract: A gas distribution plate for a chemical vapor deposition/infiltration system includes a body having a first side and a second side opposite the first side. The body may be hollow and may define an internal cavity. The gas distribution plate may also include a plurality of pass-through tubes extending through the internal cavity, a cavity inlet, and a plurality of cavity outlets. A reaction gas may be configured to flow through the plurality of pass-through tubes and a gaseous mitigation agent may be configured to flow into the internal cavity via the cavity inlet and out of the internal cavity via the plurality of cavity outlets to mix with reaction gas.
    Type: Grant
    Filed: October 10, 2019
    Date of Patent: April 13, 2021
    Assignee: GOODRICH CORPORATION
    Inventors: Ying She, Naveen G. Menon, Zissis A. Dardas, Thomas P. Filburn, Xiaodan Cai
  • Publication number: 20210026432
    Abstract: Technology for a system operable to extend a level of processor performance is disclosed. The system can comprise a power source connected to a platform voltage regulator (VR) and one or more processors and configured to provide an input power to the platform VR. The system can further comprise the platform VR connected to a peripheral interface and the one or more processors and configured to power the peripheral interface and send a power good signal to the one or more processors. The system can further comprise the peripheral interface connected to the platform VR and the one or more processors and configured to connect to a peripheral device and send a signal to the one or more processors when a peripheral interface connection state is identified as connected.
    Type: Application
    Filed: October 12, 2020
    Publication date: January 28, 2021
    Applicant: Intel Corporation
    Inventors: Naveen G, Bharath Kumar
  • Patent number: 10802565
    Abstract: Technology for a system operable to extend a level of processor performance is disclosed. The system can comprise a power source connected to a platform voltage regulator (VR) and one or more processors and configured to provide an input power to the platform VR. The system can further comprise the platform VR connected to a peripheral interface and the one or more processors and configured to power the peripheral interface and send a power good signal to the one or more processors. The system can further comprise the peripheral interface connected to the platform VR and the one or more processors and configured to connect to a peripheral device and send a signal to the one or more processors when a peripheral interface connection state is identified as connected.
    Type: Grant
    Filed: February 6, 2019
    Date of Patent: October 13, 2020
    Assignee: Intel Corporation
    Inventors: Naveen G, Bharath Kumar
  • Publication number: 20200300470
    Abstract: A method of manufacturing a ceramic matrix composite component may include introducing a gaseous precursor into an inlet portion of a chamber that houses a porous preform and introducing a gaseous mitigation agent into an outlet portion of the chamber that is downstream of the inlet portion of the chamber. The gaseous precursor may include methyltrichlorosilane (MTS) and the gaseous mitigation agent may include hydrogen gas. The introduction of the gaseous precursor may result in densification of the porous preform(s) and the introduction of the gaseous mitigation agent may shift the reaction equilibrium to disfavor the formation of harmful and/or pyrophoric byproduct deposits, which can accumulate in an exhaust conduit 340 of the system.
    Type: Application
    Filed: June 5, 2020
    Publication date: September 24, 2020
    Applicant: GOODRICH CORPORATION
    Inventors: YING SHE, NAVEEN G. MENON, ZISSIS A. DARDAS, THOMAS P. FILBURN
  • Patent number: 10712005
    Abstract: A method of manufacturing a ceramic matrix composite component may include introducing a gaseous precursor into an inlet portion of a chamber that houses a porous preform and introducing a gaseous mitigation agent into an outlet portion of the chamber that is downstream of the inlet portion of the chamber. The gaseous precursor may include methyltrichlorosilane (MTS) and the gaseous mitigation agent may include hydrogen gas. The introduction of the gaseous precursor may result in densification of the porous preform(s) and the introduction of the gaseous mitigation agent may shift the reaction equilibrium to disfavor the formation of harmful and/or pyrophoric byproduct deposits, which can accumulate in an exhaust conduit 340 of the system.
    Type: Grant
    Filed: July 14, 2017
    Date of Patent: July 14, 2020
    Assignee: GOODRICH CORPORATION
    Inventors: Ying She, Naveen G. Menon, Zissis A. Dardas, Thomas P. Filburn
  • Patent number: 10656177
    Abstract: A system includes a probe connector including first traces coupled to first conductors curvilinearly arranged around a first elongated portion of the probe connector. The system further includes a circuit board including second traces coupled to first connector pads curvilinearly arranged around a first hole in the circuit board. The first connector pads are to couple to the first conductors of the probe connector when the first elongated portion is inserted in the first hole. The system further comprises a first integrated circuit disposed on the circuit board, the first integrated circuit being coupled to the second traces.
    Type: Grant
    Filed: May 13, 2019
    Date of Patent: May 19, 2020
    Assignee: Intel Corporation
    Inventors: Vikas Rao, Navneet K. Singh, Naveen G
  • Publication number: 20200040447
    Abstract: A gas distribution plate for a chemical vapor deposition/infiltration system includes a body having a first side and a second side opposite the first side. The body may be hollow and may define an internal cavity. The gas distribution plate may also include a plurality of pass-through tubes extending through the internal cavity, a cavity inlet, and a plurality of cavity outlets. A reaction gas may be configured to flow through the plurality of pass-through tubes and a gaseous mitigation agent may be configured to flow into the internal cavity via the cavity inlet and out of the internal cavity via the plurality of cavity outlets to mix with reaction gas.
    Type: Application
    Filed: October 10, 2019
    Publication date: February 6, 2020
    Applicant: GOODRICH CORPORATION
    Inventors: Ying She, Naveen G. Menon, Zissis A. Dardas, Thomas P. Filburn, Xiaodan Cai
  • Patent number: 10480065
    Abstract: A gas distribution plate for a chemical vapor deposition/infiltration system includes a body having a first side and a second side opposite the first side. The body may be hollow and may define an internal cavity. The gas distribution plate may also include a plurality of pass-through tubes extending through the internal cavity, a cavity inlet, and a plurality of cavity outlets. A reaction gas may be configured to flow through the plurality of pass-through tubes and a gaseous mitigation agent may be configured to flow into the internal cavity via the cavity inlet and out of the internal cavity via the plurality of cavity outlets to mix with reaction gas.
    Type: Grant
    Filed: September 19, 2017
    Date of Patent: November 19, 2019
    Assignee: GOODRICH CORPORATION
    Inventors: Ying She, Naveen G. Menon, Zissis A. Dardas, Thomas P. Filburn, Xiaodan Cai
  • Publication number: 20190271720
    Abstract: A system includes a probe connector including first traces coupled to first conductors curvilinearly arranged around a first elongated portion of the probe connector. The system further includes a circuit board including second traces coupled to first connector pads curvilinearly arranged around a first hole in the circuit board. The first connector pads are to couple to the first conductors of the probe connector when the first elongated portion is inserted in the first hole. The system further comprises a first integrated circuit disposed on the circuit board, the first integrated circuit being coupled to the second traces.
    Type: Application
    Filed: May 13, 2019
    Publication date: September 5, 2019
    Inventors: Vikas Rao, Navneet K. Singh, Naveen G
  • Patent number: 10339453
    Abstract: A mechanism is provided in a data processing system for automatically generating question and answer pairs for training a question answering system for a given domain. The mechanism identifies a set of patterns of components in passages within a corpus of documents for the given domain. The mechanism identifies a set of rules that correspond to the set of patterns for generating question and answer pairs from the passages within the corpus of documents. The mechanism applies the set of rules to the passages to generate the question and answer pairs.
    Type: Grant
    Filed: December 23, 2013
    Date of Patent: July 2, 2019
    Assignee: International Business Machines Corporation
    Inventors: Naveen G. Balani, Amit P. Bohra, Krishna Kummamuru
  • Patent number: 10317428
    Abstract: Disclosed herein is technology of a probe connector for a probing pad structure around a thermal attach mounting hole. A probe connector includes a socket frame including a first channel and an elongated body including a second channel. Socket conductors are disposed in the socket frame around the first channel. The second channel is disposed at a first distal end of the elongated body, and the elongated body is disposed on the socket frame. The socket conductors are to make electrical contact with a probing pad structure disposed on a surface area around a thermal attach mounting hole of a circuit board in response to a loading attachment engaging with the elongated body via the second channel, the socket frame via the first channel, and the circuit board via the thermal attach mounting hole.
    Type: Grant
    Filed: November 2, 2016
    Date of Patent: June 11, 2019
    Assignee: Intel Corporation
    Inventors: Vikas Rao, Navneet K. Singh, Naveen G
  • Publication number: 20190171269
    Abstract: Technology for a system operable to extend a level of processor performance is disclosed. The system can comprise a power source connected to a platform voltage regulator (VR) and one or more processors and configured to provide an input power to the platform VR. The system can further comprise the platform VR connected to a peripheral interface and the one or more processors and configured to power the peripheral interface and send a power good signal to the one or more processors. The system can further comprise the peripheral interface connected to the platform VR and the one or more processors and configured to connect to a peripheral device and send a signal to the one or more processors when a peripheral interface connection state is identified as connected.
    Type: Application
    Filed: February 6, 2019
    Publication date: June 6, 2019
    Applicant: Intel Corporation
    Inventors: Naveen G, Bharath Kumar