Patents by Inventor Naveen Jain
Naveen Jain has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250047663Abstract: Leveraging a large language model (‘LLM’) for managing a fleet of storage systems, including: receiving, by a fleet management service, data describing states of a plurality of storage systems in a fleet of storage systems; requesting, by the fleet management service and from a large language model (LLM), a fleet management recommendation based on the data; and receiving, by the fleet management service and from the LLM, a fleet management recommendation for the fleet of storage systems.Type: ApplicationFiled: October 22, 2024Publication date: February 6, 2025Inventors: TIMOTHY BRENNAN, IVAN JIBAJA, NAVEEN NEELAKANTAM, AMARESH PATTANAIK, AAKASH BIST, GAURAV JAIN, SHIVA ANKAM
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Publication number: 20240353992Abstract: Implementations generally relate to an emoji visualizer. In some implementations, a method includes generating at least one emoji identifier (ID), wherein the at least one emoji ID is digitally signed with a private encryption key, and wherein the emoji ID is associated with a user. The method further includes displaying an emoji visualizer on a client device, wherein the emoji visualizer is a user interface for customizing background patterns for emoji IDs, and wherein the emoji visualizer comprises a window and a plurality of controls. The method further includes displaying the at least one emoji ID in the window of the emoji visualizer. The method further includes receiving one or more commands based on the plurality of controls of the emoji visualizer. The method further includes generating a background pattern for the at least one emoji ID, wherein the background pattern is based on the one or more commands.Type: ApplicationFiled: April 18, 2023Publication date: October 24, 2024Applicant: Emoji ID, LLCInventors: Naveen JAIN, Riccardo SPAGNI, Keith SIMON
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Publication number: 20230231723Abstract: Implementations generally relate to fan emoji identifications. In some implementations, a method includes generating a primary emoji identifier (ID), wherein the primary emoji ID is digitally signed with a primary private encryption key, and wherein the primary emoji ID is associated with a primary user. The method further includes generating a splitter emoji, wherein the splitter emoji demarcates the primary emoji ID. The method further includes generating a secondary emoji identifier (ID), wherein secondary emoji ID is associated with a secondary user. The method further includes concatenating the primary emoji ID, the splitter emoji, and the secondary emoji ID, wherein the combination of the primary emoji ID and the secondary emoji ID provides an attestation of an affinity of the secondary user to the primary user.Type: ApplicationFiled: January 18, 2022Publication date: July 20, 2023Inventors: Naveen JAIN, Riccardo SPAGNI
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Patent number: 8638532Abstract: A system and method for controlling an over current protection trip point for a voltage regulator includes an input for receiving a monitored operating parameter of the voltage regulator. Control logic responsive to this input generates a digital current control signal. A digital to analog controller converts the digital current control signal to an analog current control signal and this analog current control signal is used for controlling a current source for generating a current that establishes the over current protection trip point of the voltage regulator.Type: GrantFiled: June 25, 2012Date of Patent: January 28, 2014Assignee: Intersil Americas LLCInventors: Gustavo James Mehas, Atul Wokhlu, Naveen Jain, Xiaole Chen
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Patent number: 8593970Abstract: In one embodiment, a processor-readable medium can store code representing instructions that when executed by a processor cause the processor to receive a value representing a congestion level of a receive queue and a value representing a state of a transmit queue. At least a portion of the transmit queue can be defined by a plurality of packets addressed to the receive queue. A rate value for the transmit queue can be defined based on the value representing the congestion level of the receive queue and the value representing the state of the transmit queue. The processor-readable medium can store code representing instructions that when executed by the processor cause the processor to define a suspension time value for the transmit queue based on the value representing the congestion level of the receive queue and the value representing the state of the transmit queue.Type: GrantFiled: July 3, 2012Date of Patent: November 26, 2013Assignee: Juniper Networks, Inc.Inventors: Avanindra Godbole, Arghajit Basu, Jean-Marc Frailong, Abhijeet Sampatrao Jadav, Naveen Jain, Pradeep Sindhu
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Patent number: 8578240Abstract: A communication device may include a cyclic redundancy check (CRC) calculator. The CRC calculator may determine a packet remainder of a packet based on a data path width associated with the communication device; append zeros to the packet remainder to generate an appended packet remainder equal in size to the data path width; compute a first CRC value for the appended packet; reverse bits of the computed first CRC value to obtain a reversed CRC value; multiply the bit reversed CRC value with a value based on a reciprocal CRC polynomial to generate a multiplication product; compute a second CRC value for the generated multiplication product based on the reciprocal CRC polynomial; and reverse bits of the second CRC value to generate a CRC for the packet.Type: GrantFiled: January 21, 2011Date of Patent: November 5, 2013Assignee: Juniper Networks, Inc.Inventors: Ravi Pathakota, Abhijeet Sampatrao Jadhav, Sai Kishore, Naveen Jain
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Publication number: 20120269065Abstract: In one embodiment, a processor-readable medium can store code representing instructions that when executed by a processor cause the processor to receive a value representing a congestion level of a receive queue and a value representing a state of a transmit queue. At least a portion of the transmit queue can be defined by a plurality of packets addressed to the receive queue. A rate value for the transmit queue can be defined based on the value representing the congestion level of the receive queue and the value representing the state of the transmit queue. The processor-readable medium can store code representing instructions that when executed by the processor cause the processor to define a suspension time value for the transmit queue based on the value representing the congestion level of the receive queue and the value representing the state of the transmit queue.Type: ApplicationFiled: July 3, 2012Publication date: October 25, 2012Applicant: Juniper Networks, Inc.Inventors: Avanindra GODBOLE, Arghajit BASU, Jean-Marc FRAILONG, Abhijeet Sampatrao JADAV, Naveen JAIN, Pradeep SINDHU
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Publication number: 20120257312Abstract: A system and method for controlling an over current protection trip point for a voltage regulator includes an input for receiving a monitored operating parameter of the voltage regulator. Control logic responsive to this input generates a digital current control signal. A digital to analog controller converts the digital current control signal to an analog current control signal and this analog current control signal is used for controlling a current source for generating a current that establishes the over current protection trip point of the voltage regulator.Type: ApplicationFiled: June 25, 2012Publication date: October 11, 2012Applicant: INTERSIL AMERICAS LLCInventors: GUSTAVO JAMES MEHAS, ATUL WOKHLU, NAVEEN JAIN, XIAOLE CHEN
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Patent number: 8255252Abstract: A system and method for facilitating consistent management of a repeatable contract audit, resolution and recovery process is disclosed. A methodology that tightly defines the contract audit, resolution and recovery events enables an audit team to evaluate supplier performance against a contract, ascertain the existing health of a contract, and identify opportunities to improve and/or re-engineer a contracting process. The method begins with a meeting with a client, followed by a meeting with the supplier, and progresses to a process review, data collection, and a data analysis, which results in recommendations that are presented to the supplier based on the findings of the audit team. The audit team then works with the supplier to resolve any issues identified by the data analysis.Type: GrantFiled: January 10, 2008Date of Patent: August 28, 2012Assignee: American Express Travel Related Services Company, Inc.Inventors: Arpit Chug, Naveen Jain, Rakesh Kanda, Chetan Lohani, Shachindra Pandey
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Patent number: 8233256Abstract: A system and method for controlling an over current protection trip point for a voltage regulator includes an input for receiving a monitored operating parameter of the voltage regulator. Control logic responsive to this input generates a digital current control signal. A digital to analog controller converts the digital current control signal to an analog current control signal and this analog current control signal is used for controlling a current source for generating a current that establishes the over current protection trip point of the voltage regulator.Type: GrantFiled: February 15, 2008Date of Patent: July 31, 2012Assignee: Intersil Americas IncInventors: Gustavo James Mehas, Atul Wokhlu, Naveen Jain, Xiaole Chen
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Patent number: 8213308Abstract: In one embodiment, a processor-readable medium can store code representing instructions that when executed by a processor cause the processor to receive a value representing a congestion level of a receive queue and a value representing a state of a transmit queue. At least a portion of the transmit queue can be defined by a plurality of packets addressed to the receive queue. A rate value for the transmit queue can be defined based on the value representing the congestion level of the receive queue and the value representing the state of the transmit queue. The processor-readable medium can store code representing instructions that when executed by the processor cause the processor to define a suspension time value for the transmit queue based on the value representing the congestion level of the receive queue and the value representing the state of the transmit queue.Type: GrantFiled: September 11, 2009Date of Patent: July 3, 2012Assignee: Juniper Networks, Inc.Inventors: Avanindra Godbole, Arghajit Basu, Jean-Marc Frailong, Abhijeet Sampatrao Jadav, Naveen Jain, Pradeep Sindhu
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Patent number: 8120336Abstract: A synchronous regulator includes a controller coupled to receive a reference signal and a feedback signal from the regulator and being operable to provide a pulse width modulation (PWM) signal at its output. The regulator includes at least one gate driver coupled to receive the PWM signal and includes a synchronous output switch having a phase node therebetween controlled by the gate driver, and also including regulator input current measurement circuitry. The regulator input current measurement circuitry includes a circuit that provides a signal representative of at least one phase node timing parameter. A sensing circuit is operable to sense inductor or output current provided by the regulator. A calculation circuit is coupled to receive the signal representative of the phase node timing parameters and the inductor or output current and is operable to determine the input current from the phase node timing parameters and the inductor or output current.Type: GrantFiled: September 3, 2010Date of Patent: February 21, 2012Assignee: Intersil Americas Inc.Inventors: Gustavo James Mehas, Naveen Jain, Jayant Vivrekar, Michael Jason Houston
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Publication number: 20110160274Abstract: The present invention provides a formulation of fenofibrate with enhanced oral bioavailability, simplicity of design and manufacture and absence of food effect. The formulation comprises fenofibrate dissolved in a lipophilic surfactant, with a hydrophilic surfactant optionally added. The formulation can be effectively used in the management and treatment of conditions such as hypertriglyceridemia, hypercholesterolemia and mixed dyslipidemia, and can also be effective at lower doses as compared to commercially available products. The invention additionally relates to the process of manufacture of the formulation and to dosage forms comprising the same.Type: ApplicationFiled: June 26, 2009Publication date: June 30, 2011Applicant: PANACEA BIOTEC LIMITEDInventors: Rajesh Jain, Sarabjit Singh, Naveen Jain, Shivanand Puthli
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Publication number: 20100327825Abstract: A synchronous regulator includes a controller coupled to receive a reference signal and a feedback signal from the regulator operable to provide a pulse width modulation (PWM) signal at its output. The regulator includes at least one gate driver coupled to receive the PWM signal, and a synchronous output switch having a phase node there between controlled by the gate driver, and regulator input current measurement circuitry. The regulator input current measurement circuitry comprises a circuit operable for providing a signal representative of at least one phase node timing parameter, a sensing circuit operable for sensing inductor or output current provided by the regulator, and a calculation circuit coupled to receive the signal representative of the phase node timing parameters and the inductor or output current and is operable to determine the input current.Type: ApplicationFiled: September 3, 2010Publication date: December 30, 2010Applicant: INTERSIL AMERICAS INC.Inventors: GUSTAVO JAMES MEHAS, NAVEEN JAIN, JAYANT VIVREKAR, MICHAEL JASON HOUSTON
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Patent number: 7791324Abstract: A synchronous regulator includes a controller coupled to receive a reference signal and a feedback signal from the regulator operable to provide a pulse width modulation (PWM) signal at its output. The regulator includes at least one gate driver coupled to receive the PWM signal, and a synchronous output switch having a phase node there between controlled by the gate driver, and regulator input current measurement circuitry. The regulator input current measurement circuitry comprises a circuit operable for providing a signal representative of at least one phase node timing parameter, a sensing circuit operable for sensing inductor or output current provided by the regulator, and a calculation circuit coupled to receive the signal representative of the phase node timing parameters and the inductor or output current and is operable to determine the input current.Type: GrantFiled: March 31, 2008Date of Patent: September 7, 2010Assignee: Intersil Americas Inc.Inventors: Gustavo James Mehas, Naveen Jain, Jayant Vivrekar, Michael Jason Houston
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Publication number: 20100061390Abstract: In one embodiment, a processor-readable medium can store code representing instructions that when executed by a processor cause the processor to receive a value representing a congestion level of a receive queue and a value representing a state of a transmit queue. At least a portion of the transmit queue can be defined by a plurality of packets addressed to the receive queue. A rate value for the transmit queue can be defined based on the value representing the congestion level of the receive queue and the value representing the state of the transmit queue. The processor-readable medium can store code representing instructions that when executed by the processor cause the processor to define a suspension time value for the transmit queue based on the value representing the congestion level of the receive queue and the value representing the state of the transmit queue.Type: ApplicationFiled: September 11, 2009Publication date: March 11, 2010Inventors: Avanindra GODBOLE, Arghajit Basu, Jean-Marc Frailong, Abhijeet Sampatrao Jadav, Naveen Jain, Pradeep Sindhu
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Publication number: 20090182606Abstract: A system and method for facilitating consistent management of a repeatable contract audit, resolution and recovery process is disclosed. A methodology that tightly defines the contract audit, resolution and recovery events enables an audit team to evaluate supplier performance against a contract, ascertain the existing health of a contract, and identify opportunities to improve and/or re-engineer a contracting process. The method begins with a meeting with a client, followed by a meeting with the supplier, and progresses to a process review, data collection, and a data analysis, which results in recommendations that are presented to the supplier based on the findings of the audit team. The audit team then works with the supplier to resolve any issues identified by the data analysis.Type: ApplicationFiled: January 10, 2008Publication date: July 16, 2009Applicant: American Express Travel Related Services Company, Inc.Inventors: Arpit Chug, Naveen Jain, Rakesh Kanda, Chetan Lohani, Shachindra Pandey
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Publication number: 20090177534Abstract: A computer system and computer program product are provided that enable a supervisor to input performance evaluations for members of the supervisor's group. The supervisor is presented with an electronic evaluation form that includes evaluation items that are answered by the supervisor selecting one of a plurality of options. The evaluation form evaluates parameter, sub-parameters, skill types and skill levels as established during maintenance. Each evaluation item is categorized by at least a parameter, sub-parameter, skill type, or skill level. Answers to the evaluation items inputted by the supervisor for each of the members of the group are used to produce a graphical evaluation result based on the answers inputted by the supervisor. Consolidation of several evaluations, from the same supervisor or from several, can also be done.Type: ApplicationFiled: January 7, 2008Publication date: July 9, 2009Applicant: American Express Travel Related Services Co., Inc.Inventors: AMIT ARORA, Jyoti Rai, Naveen Jain, Vaibhav Sharma, Ruchika Arun, Shino Joseph, Amit Goel
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Publication number: 20080297957Abstract: A system and method for controlling an over current protection trip point for a voltage regulator includes an input for receiving a monitored operating parameter of the voltage regulator. Control logic responsive to this input generates a digital current control signal. A digital to analog controller converts the digital current control signal to an analog current control signal and this analog current control signal is used for controlling a current source for generating a current that establishes the over current protection trip point of the voltage regulator.Type: ApplicationFiled: February 15, 2008Publication date: December 4, 2008Applicant: INTERSIL AMERICAS INC.Inventors: GUSTAVO JAMES MEHAS, ATUL WOKHLU, NAVEEN JAIN, XIAOLE CHEN
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Publication number: 20080278123Abstract: A synchronous regulator includes a controller coupled to receive a reference signal and a feedback signal from the regulator operable to provide a pulse width modulation (PWM) signal at its output. The regulator includes at least one gate driver coupled to receive the PWM signal, and a synchronous output switch having a phase node there between controlled by the gate driver, and regulator input current measurement circuitry. The regulator input current measurement circuitry comprises a circuit operable for providing a signal representative of at least one phase node timing parameter, a sensing circuit operable for sensing inductor or output current provided by the regulator, and a calculation circuit coupled to receive the signal representative of the phase node timing parameters and the inductor or output current and is operable to determine the input current.Type: ApplicationFiled: March 31, 2008Publication date: November 13, 2008Applicant: Intersil Americas Inc.Inventors: Gustavo James Mehas, Naveen Jain, Jayant Vivrekar, Jason Houston