Patents by Inventor Naveen Lakkakula
Naveen Lakkakula has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230289229Abstract: Methods and apparatus relating to confidential computing extensions for highly scalable accelerators are described. One or more embodiments provide extensions for scalable accelerator(s) to be able to directly assign accelerator work-queue(s) to Trusted Execution Environment (TEE) Virtual Machines (TVMs). Other embodiments are also disclosed and claimed.Type: ApplicationFiled: June 30, 2022Publication date: September 14, 2023Applicant: Intel CorporationInventors: Utkarsh Y. Kakaiya, Saurabh Gayen, Kapil Sood, Naveen Lakkakula
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Patent number: 11757647Abstract: A security accelerator device stores a first credential that is uniquely associated with the individual security accelerator device and represents a root of trust to a trusted entity. The device establishes a cryptographic trust relationship with a client entity that is based on the root of trust, the cryptographic trust relationship being represented by a second credential. The device receives and store a secret credential of the client entity, which is received via communication secured by the second credential. Further, the device executes a cryptographic computation using the secret client credential on behalf of the client entity to produce a computation result.Type: GrantFiled: May 14, 2021Date of Patent: September 12, 2023Assignee: Intel CorporationInventors: Kapil Sood, Naveen Lakkakula, Hari K. Tadepalli, Lokpraveen Mosur, Rajesh Gadiyar, Patrick Fleming
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Publication number: 20230195899Abstract: An apparatus is described. The apparatus includes a plurality of processing cores and at least one accelerator within a semiconductor chip package. The accelerator is to offload at least one task from the processing cores after boot-up of the processing cores and the accelerator. The accelerator is also to perform authentication of firmware during the boot-up. The firmware is to execute on one of the at least one accelerator.Type: ApplicationFiled: February 14, 2023Publication date: June 22, 2023Inventors: Naveen LAKKAKULA, John J. BROWNE, Laurent COQUEREL, Fei Z. WANG
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Patent number: 11431351Abstract: A compression scheme can be selected for an input data stream based on characteristics of the input data stream. For example, when the input data stream is searched for pattern matches, input stream characteristics used to select a compression scheme can include one or more of: type and size of an input stream, a length of a pattern, a distance from a start of where the pattern is to be inserted to the beginning of where the pattern occurred previously, a gap between two pattern matches (including different or same patterns), standard deviation of a length of a pattern, standard deviation of a distance from a start of where the pattern is to be inserted to the beginning of where the pattern occurred previously, or standard deviation of a gap between two pattern matches. Criteria can be established whereby one or more characteristics are used to select a particular encoding scheme.Type: GrantFiled: March 8, 2019Date of Patent: August 30, 2022Assignee: Intel CorporationInventors: David K. Cassetti, Stephen T. Palermo, Sailesh Bissessur, Patrick Fleming, Lokpraveen Mosur, Smita Kumar, Pradnyesh S. Gudadhe, Naveen Lakkakula, Brian Will, Atul Kwatra
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Publication number: 20220021540Abstract: A security accelerator device stores a first credential that is uniquely associated with the individual security accelerator device and represents a root of trust to a trusted entity. The device establishes a cryptographic trust relationship with a client entity that is based on the root of trust, the cryptographic trust relationship being represented by a second credential. The device receives and store a secret credential of the client entity, which is received via communication secured by the second credential. Further, the device executes a cryptographic computation using the secret client credential on behalf of the client entity to produce a computation result.Type: ApplicationFiled: May 14, 2021Publication date: January 20, 2022Inventors: Kapil Sood, Naveen Lakkakula, Hari K. Tadepalli, Lokpraveen Mosur, Rajesh Gadiyar, Patrick Fleming
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Patent number: 11018871Abstract: A security accelerator device stores a first credential that is uniquely associated with the individual security accelerator device and represents a root of trust to a trusted entity. The device establishes a cryptographic trust relationship with a client entity that is based on the root of trust, the cryptographic trust relationship being represented by a second credential. The device receives and store a secret credential of the client entity, which is received via communication secured by the second credential. Further, the device executes a cryptographic computation using the secret client credential on behalf of the client entity to produce a computation result.Type: GrantFiled: March 30, 2018Date of Patent: May 25, 2021Assignee: Intel CorporationInventors: Kapil Sood, Naveen Lakkakula, Hari K. Tadepalli, Lokpraveen Mosur, Rajesh Gadiyar, Patrick Fleming
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Publication number: 20210117191Abstract: Methods, apparatus, systems and articles of manufacture are disclosed to control execution of tasks in a computing system. The methods, apparatus, systems and articles of manufacture include at least one storage device and at least one processor to, execute instructions to at least obtain a request to perform an inverse operation on a data flow, the data flow previously transformed during a forward operation, determine a first processor core that executed the forward operation, the data flow including an identifier of the first processor core, and transmit the data flow to a second processor core to perform the inverse operation.Type: ApplicationFiled: December 23, 2020Publication date: April 22, 2021Inventors: Andrew Cunningham, Patrick Fleming, Naveen Lakkakula, Richard Guerin, Charitra Sankar, Stephen Doyle, Ralph Castro, John Browne
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Publication number: 20210117360Abstract: Examples described herein include a system comprising: a processing unit package comprising: at least one core and at least one offload processing device communicatively coupled inline between the at least one core and a network interface controller, the at least one offload processing device configurable to perform packet processing. In some examples, the at least one offload processing device is to allow mapping of packet processing pipeline stages of networking applications among software running on the at least one core and the at least one offload processing device to permit flexible entry, exit, and re-entry points among the at least one core and the at least one offload processing device.Type: ApplicationFiled: December 26, 2020Publication date: April 22, 2021Inventors: Patrick G. KUTCH, Andrey CHILIKIN, Niall D. MCDONNELL, Brian A. KEATING, Naveen LAKKAKULA, Ilango S. GANGA, Venkidesh KRISHNA IYER, Patrick FLEMING, Lokpraveen MOSUR
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Patent number: 10680643Abstract: In connection with compression of an input stream, multiple portions of the input stream are searched against previously received portions of the input stream to find any matches of character strings in the previously received portions of the input stream. In some cases, matches of longer character strings, as opposed to shorter character strings, can be selected for inclusion in an encoded stream that is to be compressed. Delayed selection can occur whereby among multiple matches, a match that is longer can be selected for inclusion in the encoded stream and non-selected a character string match is reverted to a literal. A search engine that is searching an input stream to identify a repeat pattern of characters can cease to search for characters that were included in the selected character string match.Type: GrantFiled: March 8, 2019Date of Patent: June 9, 2020Assignee: Intel CorporationInventors: David K. Cassetti, Stephen T. Palermo, Sailesh Bissessur, Patrick Fleming, Lokpraveen Mosur, Smita Kumar, Pradnyesh S. Gudadhe, Naveen Lakkakula, Brian Will, Atul Kwatra
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Publication number: 20190273507Abstract: In connection with compression of an input stream, multiple portions of the input stream are searched against previously received portions of the input stream to find any matches of character strings in the previously received portions of the input stream. In some cases, matches of longer character strings, as opposed to shorter character strings, can be selected for inclusion in an encoded stream that is to be compressed. Delayed selection can occur whereby among multiple matches, a match that is longer can be selected for inclusion in the encoded stream and non-selected a character string match is reverted to a literal. A search engine that is searching an input stream to identify a repeat pattern of characters can cease to search for characters that were included in the selected character string match.Type: ApplicationFiled: March 8, 2019Publication date: September 5, 2019Inventors: David K. CASSETTI, Stephen T. PALERMO, Sailesh BISSESSUR, Patrick FLEMING, Lokpraveen MOSUR, Smita KUMAR, Pradnyesh S. GUDADHE, Naveen LAKKAKULA, Brian WILL, Atul KWATRA
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Publication number: 20190207624Abstract: A compression scheme can be selected for an input data stream based on characteristics of the input data stream. For example, when the input data stream is searched for pattern matches, input stream characteristics used to select a compression scheme can include one or more of: type and size of an input stream, a length of a pattern, a distance from a start of where the pattern is to be inserted to the beginning of where the pattern occurred previously, a gap between two pattern matches (including different or same patterns), standard deviation of a length of a pattern, standard deviation of a distance from a start of where the pattern is to be inserted to the beginning of where the pattern occurred previously, or standard deviation of a gap between two pattern matches. Criteria can be established whereby one or more characteristics are used to select a particular encoding scheme.Type: ApplicationFiled: March 8, 2019Publication date: July 4, 2019Inventors: David K. CASSETTI, Stephen T. PALERMO, Sailesh BISSESSUR, Patrick FLEMING, Lokpraveen MOSUR, Smita KUMAR, Pradnyesh S. GUDADHE, Naveen LAKKAKULA, Brian WILL, Atul KWATRA
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Publication number: 20190123763Abstract: A compression engine includes sets of independent search engines. The sets of independent search engines concurrently perform searches for a longest match in a stream of uncompressed data. The searches are distributed amongst the sets of independent search engines on byte boundaries to load balance the use of the search engines.Type: ApplicationFiled: December 20, 2018Publication date: April 25, 2019Inventors: Sailesh BISSESSUR, Patrick FLEMING, Lokpraveen MOSUR, David K. CASSETTI, Stephen T. PALERMO, Smita KUMAR, Pradnyesh S. GUDADHE, Naveen LAKKAKULA, Brian WILL
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Publication number: 20190044724Abstract: A security accelerator device stores a first credential that is uniquely associated with the individual security accelerator device and represents a root of trust to a trusted entity. The device establishes a cryptographic trust relationship with a client entity that is based on the root of trust, the cryptographic trust relationship being represented by a second credential. The device receives and store a secret credential of the client entity, which is received via communication secured by the second credential. Further, the device executes a cryptographic computation using the secret client credential on behalf of the client entity to produce a computation result.Type: ApplicationFiled: March 30, 2018Publication date: February 7, 2019Inventors: Kapil Sood, Naveen Lakkakula, Hari K. Tadepalli, Lokpraveen Mosur, Rajesh Gadiyar, Patrick Fleming
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Patent number: 9286125Abstract: A processing engine implementing job arbitration with ordering status is disclosed. A method of the disclosure includes receiving, by a job assigner communicably coupled to a plurality of processors, availability status from a plurality of job rings, availability status from the plurality of processors, and job entry completion status from an order manager, identifying, based on the received job entry completion status, a set of job rings from the plurality of job rings that do not exceed threshold conditions maintained by the job assigner, selecting, from the identified set of job rings, a job ring from which to pull a job entry for assignment, wherein the selecting is based on the received availability status of the plurality of job rings, and selecting, based on the received availability status of the plurality of processors, a processor to receive the assignment of the job entry for processing.Type: GrantFiled: March 14, 2013Date of Patent: March 15, 2016Assignee: INTEL CORPORATIONInventors: David A. Smiley, Naveen Lakkakula, Weiqiang Ma, Justin B. Diether, Nitin N. Garegrat
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Publication number: 20140282579Abstract: A processing engine implementing job arbitration with ordering status is disclosed. A method of the disclosure includes receiving, by a job assigner communicably coupled to a plurality of processors, availability status from a plurality of job rings, availability status from the plurality of processors, and job entry completion status from an order manager, identifying, based on the received job entry completion status, a set of job rings from the plurality of job rings that do not exceed threshold conditions maintained by the job assigner, selecting, from the identified set of job rings, a job ring from which to pull a job entry for assignment, wherein the selecting is based on the received availability status of the plurality of job rings, and selecting, based on the received availability status of the plurality of processors, a processor to receive the assignment of the job entry for processing.Type: ApplicationFiled: March 14, 2013Publication date: September 18, 2014Inventors: David A. Smiley, Naveen Lakkakula, Weiqiang Ma, Justin B. Diether, Nitin N. Garegrat