Patents by Inventor Naveen Mahadev
Naveen Mahadev has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12244288Abstract: A balun includes a first winding which has a first terminal coupled to an input, and a second terminal coupled to a reference potential terminal. The balun includes a second winding magnetically coupled to the first winding. The second winding has a first terminal coupled to a first differential output, a second terminal coupled to a second differential output, and a tap coupled to the reference potential terminal. The balun includes a first capacitor which has a first terminal coupled to the first winding and a second terminal coupled to the second winding. The balun includes a third winding which has a first terminal coupled to the reference potential terminal and a floating second terminal. The balun includes a second capacitor which has a first terminal coupled to the third winding and a second terminal coupled to the second winding.Type: GrantFiled: December 6, 2023Date of Patent: March 4, 2025Assignee: Texas Instruments IncorporatedInventors: Shagun Dusad, Vysakh Karthikeyan, Naveen Mahadev, Rafi Mahammad
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Publication number: 20240113678Abstract: A balun includes a first winding which has a first terminal coupled to an input, and a second terminal coupled to a reference potential terminal. The balun includes a second winding magnetically coupled to the first winding. The second winding has a first terminal coupled to a first differential output, a second terminal coupled to a second differential output, and a tap coupled to the reference potential terminal. The balun includes a first capacitor which has a first terminal coupled to the first winding and a second terminal coupled to the second winding. The balun includes a third winding which has a first terminal coupled to the reference potential terminal and a floating second terminal. The balun includes a second capacitor which has a first terminal coupled to the third winding and a second terminal coupled to the second winding.Type: ApplicationFiled: December 6, 2023Publication date: April 4, 2024Inventors: Shagun Dusad, Vysakh Karthikeyan, Naveen Mahadev, Rafi Mahammad
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Patent number: 11888459Abstract: A balun includes a first winding which has a first terminal coupled to an input, and a second terminal coupled to a reference potential terminal. The balun includes a second winding magnetically coupled to the first winding. The second winding has a first terminal coupled to a first differential output, a second terminal coupled to a second differential output, and a tap coupled to the reference potential terminal. The balun includes a first capacitor which has a first terminal coupled to the first winding and a second terminal coupled to the second winding. The balun includes a third winding which has a first terminal coupled to the reference potential terminal and a floating second terminal. The balun includes a second capacitor which has a first terminal coupled to the third winding and a second terminal coupled to the second winding.Type: GrantFiled: September 1, 2021Date of Patent: January 30, 2024Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Shagun Dusad, Vysakh Karthikeyan, Naveen Mahadev, Rafi Mahammad
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Publication number: 20220173710Abstract: A balun includes a first winding which has a first terminal coupled to an input, and a second terminal coupled to a reference potential terminal. The balun includes a second winding magnetically coupled to the first winding. The second winding has a first terminal coupled to a first differential output, a second terminal coupled to a second differential output, and a tap coupled to the reference potential terminal. The balun includes a first parasitic capacitor which has a first terminal coupled to the first winding and a second terminal coupled to the second winding. The balun includes a third winding which has a first terminal coupled to the reference potential terminal and a floating second terminal. The balun includes a second parasitic capacitor which has a first terminal coupled to the third winding and a second terminal coupled to the second winding.Type: ApplicationFiled: August 25, 2021Publication date: June 2, 2022Inventors: Shagun Dusad, Vysakh Karthikeyan, Naveen Mahadev, Rafi Mahammad
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Publication number: 20220173711Abstract: A balun includes a first winding which has a first terminal coupled to an input, and a second terminal coupled to a reference potential terminal. The balun includes a second winding magnetically coupled to the first winding. The second winding has a first terminal coupled to a first differential output, a second terminal coupled to a second differential output, and a tap coupled to the reference potential terminal. The balun includes a first capacitor which has a first terminal coupled to the first winding and a second terminal coupled to the second winding. The balun includes a third winding which has a first terminal coupled to the reference potential terminal and a floating second terminal. The balun includes a second capacitor which has a first terminal coupled to the third winding and a second terminal coupled to the second winding.Type: ApplicationFiled: September 1, 2021Publication date: June 2, 2022Inventors: Shagun Dusad, Vysakh Karthikeyan, Naveen Mahadev, Rafi Mahammad
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Patent number: 10924309Abstract: A receiver circuit includes a quadrature signal generator to generate an in-phase (I) signal and a quadrature (Q) signal from a local oscillator signal and an IQ phase sense and control circuit to generate a phase adjustment code responsive to a phase error between quadrature signals generated by a plurality of mixers. The receiver circuit also includes a phase corrector to adjust a phase difference between the I and Q signals from the quadrature signal generator to generate corrected I and Q signals to be provided to the plurality of mixers.Type: GrantFiled: February 18, 2020Date of Patent: February 16, 2021Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Yogesh Darwhekar, Pranav Kumar, Arpan Thakkar, Naveen Mahadev, Srikanth Manian
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Publication number: 20200186403Abstract: A receiver circuit includes a quadrature signal generator to generate an in-phase (I) signal and a quadrature (Q) signal from a local oscillator signal and an IQ phase sense and control circuit to generate a phase adjustment code responsive to a phase error between quadrature signals generated by a plurality of mixers. The receiver circuit also includes a phase corrector to adjust a phase difference between the I and Q signals from the quadrature signal generator to generate corrected I and Q signals to be provided to the plurality of mixers.Type: ApplicationFiled: February 18, 2020Publication date: June 11, 2020Inventors: Yogesh DARWHEKAR, Pranav KUMAR, Arpan THAKKAR, Naveen MAHADEV, Srikanth MANIAN
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Patent number: 10608853Abstract: A receiver circuit includes a quadrature signal generator to generate an in-phase (I) signal and a quadrature (Q) signal from a local oscillator signal and an IQ phase sense and control circuit to generate a phase adjustment code responsive to a phase error between quadrature signals generated by a plurality of mixers. The receiver circuit also includes a phase corrector to adjust a phase difference between the I and Q signals from the quadrature signal generator to generate corrected I and Q signals to be provided to the plurality of mixers.Type: GrantFiled: September 13, 2018Date of Patent: March 31, 2020Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Yogesh Darwhekar, Pranav Kumar, Arpan Thakkar, Naveen Mahadev, Srikanth Manian
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Publication number: 20200092148Abstract: A receiver circuit includes a quadrature signal generator to generate an in-phase (I) signal and a quadrature (Q) signal from a local oscillator signal and an IQ phase sense and control circuit to generate a phase adjustment code responsive to a phase error between quadrature signals generated by a plurality of mixers. The receiver circuit also includes a phase corrector to adjust a phase difference between the I and Q signals from the quadrature signal generator to generate corrected I and Q signals to be provided to the plurality of mixers.Type: ApplicationFiled: September 13, 2018Publication date: March 19, 2020Inventors: Yogesh DARWHEKAR, Pranav KUMAR, Arpan THAKKAR, Naveen MAHADEV, Srikanth MANIAN
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Patent number: 9716472Abstract: Methods and circuits for maximizing gain of a voltage follower circuit are provided. The method includes using a NMOS voltage replica generation circuit, a PMOS voltage replica generation circuit, a NPN BJT voltage replica generation circuit, a n-channel JFET voltage replica generation circuit, a P-Channel JFET voltage replica generation circuit and a PNP BJT voltage replica generation circuit. The overall gain for the various transistor families is almost equal to unity.Type: GrantFiled: July 15, 2016Date of Patent: July 25, 2017Inventors: Himamshu Gopalakrishna Khasnis, Anantha Melavarige Subraya, Naveen Mahadev
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Publication number: 20170111013Abstract: Methods and circuits for maximizing gain of a voltage follower circuit are provided. The method includes using a NMOS voltage replica generation circuit, a PMOS voltage replica generation circuit, a NPN BJT voltage replica generation circuit, a n-channel JFET voltage replica generation circuit, a P-Channel JFET voltage replica generation circuit and a PNP BJT voltage replica generation circuit. The overall gain for the various transistor families is almost equal to unity.Type: ApplicationFiled: July 15, 2016Publication date: April 20, 2017Inventors: Himamshu Gopalakrishna Khasnis, Anantha Melavarige Subraya, Naveen Mahadev
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Patent number: 9584077Abstract: A method and system of synthesizing impedance in a radio frequency (RF) amplifier includes receiving a voltage signal at a passive mixer. The passive mixer down-converts the voltage signal into a baseband frequency. The method includes converting the voltage signal into a digital signal. Further, the method includes performing convolution of the digital signal with an impulse response. The impulse response is of a low Q impedance and is programmable. Furthermore the method includes generating a current signal based on output of the convolution. Furthermore the method includes performing up-conversion of the current signal in the passive mixer. The passive mixer performs impedance transformation of the low Q impedance. Moreover, the method includes providing the current signal via the passive mixer to synthesize desired impedance in the RF amplifier, thereby controlling frequency response of the RF amplifier.Type: GrantFiled: October 6, 2015Date of Patent: February 28, 2017Inventors: Himamshu Gopalakrishna Khasnis, Naveen Mahadev
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Publication number: 20160344354Abstract: A method and system of synthesizing impedance in a radio frequency (RF) amplifier includes receiving a voltage signal at a passive mixer. The passive mixer down-converts the voltage signal into a baseband frequency. The method includes converting the voltage signal into a digital signal. Further, the method includes performing convolution of the digital signal with an impulse response. The impulse response is of a low Q impedance and is programmable. Furthermore the method includes generating a current signal based on output of the convolution. Furthermore the method includes performing up-conversion of the current signal in the passive mixer. The passive mixer performs impedance transformation of the low Q impedance. Moreover, the method includes providing the current signal via the passive mixer to synthesize desired impedance in the RF amplifier, thereby controlling frequency response of the RF amplifier.Type: ApplicationFiled: October 6, 2015Publication date: November 24, 2016Inventors: Himamshu Gopalakrishna Khasnis, Naveen Mahadev