Patents by Inventor Navin Chander

Navin Chander has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20050180376
    Abstract: A system and method is provided for processing four samples per clock period of an orthogonal frequency division multiplex symbol 10 having a length not a multiple of four. The method includes providing a sequence of data samples 12 and a sequence of non-data samples 14 and 16. The method includes selecting four input samples from one of the data samples 12 and the non-data samples 14 and 16 based on a clock signal. The method includes storing at least a portion of contents of a first group of memory cells 112 in a second group of memory cells 116. The first group of memory cells 112 comprised of four memory cells 112a-d. The method also provides for storing the selected four input samples in the first group of memory cells 112.
    Type: Application
    Filed: January 14, 2005
    Publication date: August 18, 2005
    Applicant: Texas Instruments Incorporated
    Inventors: Navin Chander, Srinadh Madhavapeddi, Mitsuru Shimada, Srinivas Lingam
  • Publication number: 20030039354
    Abstract: A FIFO is implemented as a buffer to encrypt/decrypt packet data and return the data to the same location where it was initially stored. No additional buffer or difficult buffer size decision is therefore required to compensate for the latency associated with the encryption/decryption. The FIFO implementation includes primary and secondary pointers. The primary pointers are available to the transmit/receive circuitry and the secondary pointers are used by the cryptographic circuit. When data is initially loaded into the FIFO, the FIFO does not report data availability to the primary user until the secondary user (cryptographic service) has read a block and returned the block to the same location. The FIFO is implemented via a single port RAM. Blocks are based on the encryption block size. The FIFO similarly reports packet availability based on application packet sizes (such as 188 MPEG2 transport stream packets).
    Type: Application
    Filed: August 27, 2001
    Publication date: February 27, 2003
    Inventors: David E. Kimble, Mitsuru Shimada, Navin Chander