Patents by Inventor Naxin Wang
Naxin Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11644165Abstract: The present disclosure discloses a lamp for water mist in the shape of a flame, which includes a base, wherein a water tank is arranged on the top of the base, an ultrasonic atomizer is provided at the bottom of the water tank, an upwardly protruding component is centrally arranged at the bottom of the water tank, a plurality of supporting blocks are arranged at the bottom of the spacer plate near the through hole, and a baffle plate is arranged between the supporting blocks and the protruding component, a channel is formed between the spacer plate and the baffle plate, and a plurality of LED lights are provided on the top of the water tank, a housing is provided outside the water tank, the top part of the housing is provided with a top cover having a lamp hole.Type: GrantFiled: June 13, 2022Date of Patent: May 9, 2023Assignee: INTERTEC TECHNOLOGY LIMITEDInventors: Hing Kin William Ma, Naxin Wang
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Publication number: 20220403993Abstract: The present disclosure discloses a lamp for water mist in the shape of a flame, which includes a base, wherein a water tank is arranged on the top of the base, an ultrasonic atomizer is provided at the bottom of the water tank, an upwardly protruding component is centrally arranged at the bottom of the water tank, a plurality of supporting blocks are arranged at the bottom of the spacer plate near the through hole, and a baffle plate is arranged between the supporting blocks and the protruding component, a channel is formed between the spacer plate and the baffle plate, and a plurality of LED lights are provided on the top of the water tank, a housing is provided outside the water tank, the top part of the housing is provided with a top cover having a lamp hole.Type: ApplicationFiled: June 13, 2022Publication date: December 22, 2022Inventors: Hing Kin William MA, Naxin WANG
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Patent number: 8520740Abstract: Mechanisms for performing decoding of context-adaptive binary arithmetic coding (CABAC) encoded data. The mechanisms receive, in a first single instruction multiple data (SIMD) vector register of the data processing system, CABAC encoded data of a bit stream. The CABAC encoded data includes a value to be decoded and bit stream state information. The mechanisms receive, in a second SIMD vector register of the data processing system, CABAC decoder context information. The mechanisms process the value, the bit stream state information, and the CABAC decoder context information in a non-recursive manner to generate a decoded value, updated bit stream state information, and updated CABAC decoder context information. The mechanisms store, in a third SIMD vector register, a result vector that combines the decoded value, updated bit stream state information, and updated CABAC decoder context information. The mechanisms use the decoded value to generate a video output on the data processing system.Type: GrantFiled: September 2, 2010Date of Patent: August 27, 2013Assignees: International Business Machines Corporation, Sony Computer Entertainment Inc.Inventors: Brian Flachs, Charles R. Johns, Michael A. Kutner, Brad W. Michael, Naxin Wang
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Patent number: 8437404Abstract: A decoder for decoding a plurality of digital video data is described. In an embodiment, the decoder comprises a DV video decoder for decoding digital video data which is formatted according to the DV standard. The DV video decoder has a Very-Long Instruction Word (VLIW) processor and a variable length decoding unit. The VLIW processor includes a preparser unit for recovering a decoding order of the digital video data so that the variable length decoding unit can process the digital video data. The variable length decoding unit decodes a variable length coding format of the digital video data which has been preparsed by the VLIW processor. Furthermore, the VLIW processor includes a decompression unit for decompressing the digital video data which has been decoded by the variable length decoding unit. In an embodiment, the VLIW processor and the variable length decoding unit are formed on the same semiconductor device.Type: GrantFiled: November 7, 2006Date of Patent: May 7, 2013Assignees: Sony Corporation, Sony Electronics Inc.Inventors: Amelia C. Luna, Jason (Naxin) Wang
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Publication number: 20120057637Abstract: Mechanisms for performing decoding of context-adaptive binary arithmetic coding (CABAC) encoded data. The mechanisms receive, in a first single instruction multiple data (SIMD) vector register of the data processing system, CABAC encoded data of a bit stream. The CABAC encoded data comprises a value to be decoded and bit stream state information. The mechanisms receive, in a second SIMD vector register of the data processing system, CABAC decoder context information. The mechanisms process the value, the bit stream state information, and the CABAC decoder context information in a non-recursive manner to generate a decoded value, updated bit stream state information, and updated CABAC decoder context information. The mechanisms store, in a third SIMD vector register, a result vector that combines the decoded value, updated bit stream state information, and updated CABAC decoder context information. The mechanisms use the decoded value to generate a video output on the data processing system.Type: ApplicationFiled: September 2, 2010Publication date: March 8, 2012Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Brian Flachs, Charles R. Johns, Michael A. Kutner, Brad W. Michael, Naxin Wang
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Publication number: 20110310972Abstract: Methods and systems are disclosed for decoding image data including I-picture, P-picture, and B-picture encoded data. A method includes receiving encoded image data and selectively performing a modified inverse discrete cosine transform (IDCT) process to generate output pixel array blocks at a lower resolution than the resolution of the received image data. The image data can be 8×8 pixel array blocks, which are used to produce lower resolution pixel array blocks such as, for example, 4×8 or 4×4 pixel array blocks. In certain instances, after the IDCT process is performed, the resulting pixel data is up-sampled before motion compensation is performed. Furthermore, in certain instances, the resulting pixel data is subjected to motion compensation and scaled to display size prior to display.Type: ApplicationFiled: August 25, 2011Publication date: December 22, 2011Inventors: Jason Naxin Wang, Ikuo Tsukagoshi
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Patent number: 8045622Abstract: Methods and systems are disclosed for decoding image data including I-picture, P-picture, and B-picture encoded data. A method includes receiving encoded image data and selectively performing a modified inverse discrete cosine transform (IDCT) process to generate output pixel array blocks at a lower resolution than the resolution of the received image data. The image data can be 8×8 pixel array blocks, which are used to produce lower resolution pixel array blocks such as, for example, 4×8 or 4×4 pixel array blocks. In certain instances, after the IDCT process is performed, the resulting pixel data is up-sampled before motion compensation is performed. Furthermore, in certain instances, the resulting pixel data is subjected to motion compensation and scaled to display size prior to display.Type: GrantFiled: April 17, 2007Date of Patent: October 25, 2011Assignees: Sony Corporation, Sony Electronics, Inc.Inventors: Jason Naxin Wang, Ikuo Tsukagoshi
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Publication number: 20090100188Abstract: A method for caching of stream data is accomplished by assigning for each video segment in the system a likelihood rating of future showing and then determining for each node that contains a copy of the segment a second likelihood value that reflecting a probability that the node will be used to serve streams for the segment. The future cost value of a segment copy is then predicted and preload orders are issued to nodes for segments with the per-copy likelihood above a predefined threshold.Type: ApplicationFiled: October 11, 2007Publication date: April 16, 2009Applicant: UTSTARCOM, INC.Inventors: Qiang Li, Naxin Wang, Li-Cheng Tai, Zhen Zeng
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Publication number: 20090019161Abstract: An EPG service architecture incorporates multiple EPG servers connected in a cluster with each EPG server having an EPG service module and a dispatcher. Each dispatcher has the capability for state determination as an active or standby dispatcher. A plurality of STBs interface with the EPG server cluster and issue requests for EPG service which are routed by the active dispatcher. The routing is accomplished by redirection of the request to an EPG service module selected from the multiple EPG servers in the cluster. Each EPG service module includes the capability for service connection to the STB upon receiving the redirection from the active dispatcher. Upon a determination that the current active dispatcher is not operating, the standby dispatchers vote for a replacement which then assumes the active dispatcher role.Type: ApplicationFiled: July 12, 2007Publication date: January 15, 2009Applicant: UTSTARCOM, INC.Inventors: Qiang Li, Huiyou Zhu, Chen Ma, Naxin Wang
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Publication number: 20090019493Abstract: An EPG service architecture incorporates multiple EPG servers connected in a cluster. An active dispatcher is associated with at least one EPG server and multiple standby dispatchers are associated with the cluster. A plurality of STBs interfaced with the EPG server cluster issue requests for EPG service for which the active dispatcher employs an affiliation table as a portion of the cache for redirecting each request to a specific one of the EPG servers affiliated with the STB issuing the request. The active dispatcher multicasts the affiliation table to the multiple standby dispatchers for synchronization.Type: ApplicationFiled: July 12, 2007Publication date: January 15, 2009Applicant: UTSTARCOM, INC.Inventors: Qiang Li, Chen Ma, Huiyou Zhu, Naxin Wang
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Patent number: 7472197Abstract: A system for live TV transmission over IP networks incorporates a content encoder receiving live TV broadcast and converting to RTP packets for multicast streaming. A streaming server receives the multicast RTP packets from the content encoder and converts the multicast stream to a unicast stream. The streaming server is also responsive to RTSP commands for trick mode operation. A settop box is connected through an IP network for receiving multicast RTP packets from the content encoder and generating RTSP commands for trick mode operation, the setup box issuing a leave multicast group signal upon issuing a trick mode command and receiving unicast transmission of RTP packets from the streaming server controllable by the trick mode commands.Type: GrantFiled: October 31, 2005Date of Patent: December 30, 2008Assignee: UT Starcom, Inc.Inventors: Qiang Li, Naxin Wang, Li-Cheng Tai
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Publication number: 20080319840Abstract: A system for real time auctioning of advertising timeslots for live TV transmission over IP networks incorates settop boxes interconnected to a searver to provide real time viewing statistics to an advertising management system which also receives subscriber information from a subscriber management system which also management system determines demographics responsive to the subscriber information and viewing statistics and publishes advertising timeslot information and the determined demongraphics. A management terminal is employed for creating user accounts, providing access information to users, inspecting and approving advertisements responsive to input the advertisements from the users. Bid parameters are defined using the management terminal and the publication by the system to the users is responsive to the bid parameters.Type: ApplicationFiled: June 20, 2007Publication date: December 25, 2008Applicant: UTSTARCOM, INC.Inventors: Qiang Li, William X. Huang, Naxin Wang
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Publication number: 20080005349Abstract: A media content distribution system for distributed multimedia streaming communicates over a network and incorporates multiple independent media stations, each having a media director for control and a number of media engines for storage, retrieval and streaming of media content. A content request from a media console connected to the network is redirected by the media director to a selected one of the media engines storing content corresponding to the request for streaming. Statistical indicators are defined for measuring effectiveness of the content distribution network. Push and pull indicators with additional differentiation for remote and local access to pulled content provide means for efficiency determination of data distribution and storage. A middleware Application Programming Interface (API) structure is provided for flexible interfacing between media consoles and content distribution system components.Type: ApplicationFiled: May 7, 2007Publication date: January 3, 2008Applicant: UTSTARCOMInventors: Qiang Li, Jifei Song, Zhen Zeng, Naxin Wang
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Patent number: 7227895Abstract: Methods and systems are disclosed for decoding image data including I-picture, P-picture, and B-picture encoded data. A method includes receiving encoded image data and selectively performing a modified inverse discrete cosine transform (IDCT) process to generate output pixel array blocks at a lower resolution than the resolution of the received image data. The image data can be 8×8 pixel array blocks, which are used to produce lower resolution pixel array blocks such as, for example, 4×8 or 4×4 pixel array blocks. In certain instances, after the IDCT process is performed, the resulting pixel data is up-sampled before motion compensation is performed. Furthermore, in certain instances, the resulting pixel data is subjected to motion compensation and scaled to display size prior to display.Type: GrantFiled: December 11, 2001Date of Patent: June 5, 2007Assignees: Sony Corporation, Sony ElectronicsInventors: Jason Naxin Wang, Ikuo Tsukagoshi
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Publication number: 20070101012Abstract: A system for live TV transmission over IP networks incorporates a content encoder receiving live TV broadcast and converting to RTP packets for multicast streaming. A streaming server receives the multicast RTP packets from the content encoder and converts the multicast stream to a unicast stream. The streaming server is also responsive to RTSP commands for trick mode operation. A settop box is connected through an IP network for receiving multicast RTP packets from the content encoder and generating RTSP commands for trick mode operation, the setup box issuing a leave multicast group signal upon issuing a trick mode command and receiving unicast transmission of RTP packets from the streaming server controllable by the trick mode commands.Type: ApplicationFiled: October 31, 2005Publication date: May 3, 2007Applicant: UTSTARCOM, INC.Inventors: Qiang Li, Naxin Wang, Li-Cheng Tai
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METHOD AND APPARATUS FOR IP MULTICAST RELAY OF LIVE TV STREAMING TRAFFIC IN A TV-OVER-IP ENVIRONMENT
Publication number: 20070097955Abstract: A system for live TV transmission over IP networks incorporates a head end real-time encoding/transcoding server for converting live TV encoded data streams with root multicast relay servers receiving multicast data streams from the encoding/transcoding server. The multicast stream output is provided to a first set of relay servers through multicast capable routers and the root multicast servers provide unicast stream output to a second set of relay servers through unicast limited routers. The first and second sets of relay servers provide unicast and multicast stream output for child servers or local access networks.Type: ApplicationFiled: October 28, 2005Publication date: May 3, 2007Applicant: UTSTARCOM, INCInventors: Qiang Li, Naxin Wang, Jiffei Song -
Publication number: 20070052842Abstract: A decoder for decoding a plurality of digital video data is described. In an embodiment, the decoder comprises a DV video decoder for decoding digital video data which is formatted according to the DV standard. The DV video decoder has a Very-Long Instruction Word (VLIW) processor and a variable length decoding unit. The VLIW processor includes a preparser unit for recovering a decoding order of the digital video data so that the variable length decoding unit can process the digital video data. The variable length decoding unit decodes a variable length coding format of the digital video data which has been preparsed by the VLIW processor. Furthermore, the VLIW processor includes a decompression unit for decompressing the digital video data which has been decoded by the variable length decoding unit. In an embodiment, the VLIW processor and the variable length decoding unit are formed on the same semiconductor device.Type: ApplicationFiled: November 7, 2006Publication date: March 8, 2007Applicants: SONY CORPORATION, SONY ELECTRONICS INC.Inventors: Amelia Luna, Jason (Naxin) Wang
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Patent number: 7158571Abstract: System and method for balancing video encoding tasks between multiple processors. The method may include receiving a real time video stream, performing picture level and upper processing on a main processor, executing a macroblock loop in parallel on a main processor and a co-processor, wherein executing includes processing a first group of video encoding tasks on the main processor and processing a second group of video encoding tasks on the co-processor, and outputting an encoded version of the real time broadcast. The method may be implemented on a system that includes a main processor, a co-processor, and an interface to receive the real time video stream, each coupled to one or more buses. The encoding may be performed according to the well known Moving Pictures Experts Group (MPEG) standards.Type: GrantFiled: December 11, 2001Date of Patent: January 2, 2007Assignees: Sony Corporation, Sony Electronics Inc.Inventors: Jason Naxin Wang, Masahito Yamane, Ikuo Tsukagoshi
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Patent number: 7151800Abstract: A decoder for decoding a plurality of digital video data is described. In an embodiment, the decoder comprises a DV video decoder for decoding digital video data which is formatted according to the DV standard. The DV video decoder has a Very-Long Instruction Word (VLIW) processor and a variable length decoding unit. The VLIW processor includes a preparser unit for recovering a decoding order of the digital video data so that the variable length decoding unit can process the digital video data. The variable length decoding unit decodes a variable length coding format of the digital video data which has been preparsed by the VLIW processor. Furthermore, the VLIW processor includes a decompression unit for decompressing the digital video data which has been decoded by the variable length decoding unit. In an embodiment, the VLIW processor and the variable length decoding unit are formed on the same semiconductor device.Type: GrantFiled: November 6, 2000Date of Patent: December 19, 2006Assignees: Sony Corporation, Sony Electronics, Inc.Inventors: Amelia C. Luna, Jason (Naxin) Wang
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Patent number: 7142603Abstract: A method and system for decoding symbols of variable length in a digital video bit stream in real time, using Very Long Instruction Word (VLIW) architecture. In one embodiment, several bit sections are first read from a bit stream. While the first bit section will correspond to a valid symbol in the bit-stream, the rest of the bit sections may or may not, depending on the length of the first section. A table of variable length codes is then indexed to obtain a look-up result for each of the read-in bit sections, which done in parallel for all sections. Next, a determination is made as to whether each of the look-up results is valid. A valid look-up result provides the length of the symbol. The valid look-up values are then accepted. In another embodiment the bit stream is thereafter advanced by the sum of all accepted look-up results.Type: GrantFiled: August 20, 2001Date of Patent: November 28, 2006Assignees: Sony Corporation, Sony Electronics, Inc.Inventors: Amelia C. Luna, Jason (Naxin) Wang