Patents by Inventor Neal A. Galbo
Neal A. Galbo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11954370Abstract: The present disclosure includes apparatuses and methods for command queuing. A number of embodiments include receiving a queued command request at a memory system from a host, sending a command response from the memory system to the host that indicates the memory system is ready to receive a command in a command queue of the memory system, and receiving, in response to sending the command response, a command descriptor block for the command at the memory system from the host.Type: GrantFiled: November 7, 2022Date of Patent: April 9, 2024Inventors: Victor Y. Tsai, Danilo Caraccio, Daniele Balluchi, Neal A. Galbo, Robert Warren
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Publication number: 20230054662Abstract: The present disclosure includes apparatuses and methods for command queuing. A number of embodiments include receiving a queued command request at a memory system from a host, sending a command response from the memory system to the host that indicates the memory system is ready to receive a command in a command queue of the memory system, and receiving, in response to sending the command response, a command descriptor block for the command at the memory system from the host.Type: ApplicationFiled: November 7, 2022Publication date: February 23, 2023Inventors: Victor Y. Tsai, Danilo Caraccio, Daniele Balluchi, Neal A. Galbo, Robert Warren
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Patent number: 11494122Abstract: The present disclosure includes apparatuses and methods for command queuing. A number of embodiments include receiving a queued command request at a memory system from a host, sending a command response from the memory system to the host that indicates the memory system is ready to receive a command in a command queue of the memory system, and receiving, in response to sending the command response, a command descriptor block for the command at the memory system from the host.Type: GrantFiled: January 4, 2021Date of Patent: November 8, 2022Assignee: Micron Technology, Inc.Inventors: Victor Y. Tsai, Danilo Caraccio, Daniele Balluchi, Neal A. Galbo, Robert Warren
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Publication number: 20210200478Abstract: The present disclosure includes apparatuses and methods for command queuing. A number of embodiments include receiving a queued command request at a memory system from a host, sending a command response from the memory system to the host that indicates the memory system is ready to receive a command in a command queue of the memory system, and receiving, in response to sending the command response, a command descriptor block for the command at the memory system from the host.Type: ApplicationFiled: January 4, 2021Publication date: July 1, 2021Inventors: Victor Y. Tsai, Danilo Caraccio, Daniele Balluchi, Neal A. Galbo, Robert Warren
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Publication number: 20210019052Abstract: The present disclosure includes apparatuses, methods, and systems for data relocation in memory. An embodiment includes a controller, and a memory having a plurality of physical units of memory cells. Each of the physical units has a different sequential physical address associated therewith, a first number of the physical units have data stored therein, a second number of the physical units do not have data stored therein, and the physical address associated with each respective one of the second number of physical units is a different consecutive physical address in the sequence. The controller can relocate the data stored in the physical unit of the first number of physical units, whose physical address in the sequence is immediately before the first of the consecutive physical addresses associated with the second number of physical units, to the last of the consecutive physical addresses associated with the second number of physical units.Type: ApplicationFiled: October 2, 2020Publication date: January 21, 2021Inventor: Neal A. Galbo
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Patent number: 10884661Abstract: The present disclosure includes apparatuses and methods for command queuing. A number of embodiments include receiving a queued command request at a memory system from a host, sending a command response from the memory system to the host that indicates the memory system is ready to receive a command in a command queue of the memory system, and receiving, in response to sending the command response, a command descriptor block for the command at the memory system from the host.Type: GrantFiled: December 3, 2018Date of Patent: January 5, 2021Assignee: Micron Technology, Inc.Inventors: Victor Y. Tsai, Danilo Caraccio, Daniele Balluchi, Neal A. Galbo, Robert Warren
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Patent number: 10795576Abstract: The present disclosure includes apparatuses, methods, and systems for data relocation in memory. An embodiment includes a controller, and a memory having a plurality of physical units of memory cells. Each of the physical units has a different sequential physical address associated therewith, a first number of the physical units have data stored therein, a second number of the physical units do not have data stored therein, and the physical address associated with each respective one of the second number of physical units is a different consecutive physical address in the sequence. The controller can relocate the data stored in the physical unit of the first number of physical units, whose physical address in the sequence is immediately before the first of the consecutive physical addresses associated with the second number of physical units, to the last of the consecutive physical addresses associated with the second number of physical units.Type: GrantFiled: November 1, 2018Date of Patent: October 6, 2020Assignee: Micron Technology, Inc.Inventor: Neal A. Galbo
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Patent number: 10762003Abstract: The present disclosure includes methods, devices, and systems for state change in systems having devices coupled in a chained configuration. A number of embodiments include a host and a number of devices coupled to the host in a chained configuration. The chained configuration includes at least one device that is not directly coupled to the host. The at least one device that is not directly coupled to the host is configured to change from a first communication state to a second communication state responsive to receipt of a command from the host.Type: GrantFiled: August 31, 2018Date of Patent: September 1, 2020Assignee: Micron Technology, Inc.Inventors: William H. Radke, Victor Y. Tsai, James Cooke, Neal A. Galbo, Peter Feeley
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Publication number: 20200142589Abstract: The present disclosure includes apparatuses, methods, and systems for data relocation in memory. An embodiment includes a controller, and a memory having a plurality of physical units of memory cells. Each of the physical units has a different sequential physical address associated therewith, a first number of the physical units have data stored therein, a second number of the physical units do not have data stored therein, and the physical address associated with each respective one of the second number of physical units is a different consecutive physical address in the sequence. The controller can relocate the data stored in the physical unit of the first number of physical units, whose physical address in the sequence is immediately before the first of the consecutive physical addresses associated with the second number of physical units, to the last of the consecutive physical addresses associated with the second number of physical units.Type: ApplicationFiled: November 1, 2018Publication date: May 7, 2020Inventor: Neal A. Galbo
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Publication number: 20190102112Abstract: The present disclosure includes apparatuses and methods for command queuing. A number of embodiments include receiving a queued command request at a memory system from a host, sending a command response from the memory system to the host that indicates the memory system is ready to receive a command in a command queue of the memory system, and receiving, in response to sending the command response, a command descriptor block for the command at the memory system from the host.Type: ApplicationFiled: December 3, 2018Publication date: April 4, 2019Inventors: Victor Y. Tsai, Danilo Caraccio, Daniele Balluchi, Neal A. Galbo, Robert Warren
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Publication number: 20180373650Abstract: The present disclosure includes methods, devices, and systems for state change in systems having devices coupled in a chained configuration. A number of embodiments include a host and a number of devices coupled to the host in a chained configuration. The chained configuration includes at least one device that is not directly coupled to the host. The at least one device that is not directly coupled to the host is configured to change from a first communication state to a second communication state responsive to receipt of a command from the host.Type: ApplicationFiled: August 31, 2018Publication date: December 27, 2018Inventors: William H. Radke, Victor Y. Tsai, James Cooke, Neal A. Galbo, Peter Feeley
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Patent number: 10146477Abstract: The present disclosure includes apparatuses and methods for command queuing. A number of embodiments include receiving a queued command request at a memory system from a host, sending a command response from the memory system to the host that indicates the memory system is ready to receive a command in a command queue of the memory system, and receiving, in response to sending the command response, a command descriptor block for the command at the memory system from the host.Type: GrantFiled: August 25, 2016Date of Patent: December 4, 2018Assignee: Micron Technology, Inc.Inventors: Victor Y. Tsai, Danilo Caraccio, Daniele Balluchi, Neal A. Galbo, Robert Warren
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Patent number: 10089250Abstract: The present disclosure includes methods, devices, and systems for state change in systems having devices coupled in a chained configuration. A number of embodiments include a host and a number of devices coupled to the host in a chained configuration. The chained configuration includes at least one device that is not directly coupled to the host. The at least one device that is not directly coupled to the host is configured to change from a first communication state to a second communication state responsive to receipt of a command from the host.Type: GrantFiled: January 11, 2016Date of Patent: October 2, 2018Assignee: Micron Technology, Inc.Inventors: William H. Radke, Victor Y. Tsai, James Cooke, Neal A. Galbo, Peter Feeley
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Patent number: 9929967Abstract: The present disclosure includes methods, devices, and systems for packet processing. One method embodiment for packet flow control includes deconstructing a transport layer packet into a number of link-control layer packets, wherein each of the link-control layer packets has an associated sequence number, communicating the number of link-control layer packets via a common physical connection for a plurality of peripheral devices, and limiting a number of outstanding link-control layer packets during the communication.Type: GrantFiled: December 17, 2013Date of Patent: March 27, 2018Assignee: Micron Technology, Inc.Inventors: William H. Radke, Victor Y. Tsai, Peter Feeley, Neal A. Galbo, Robert N. Leibowitz
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Patent number: 9811258Abstract: The present disclosure includes methods for controlling host memory access with a memory device, systems, host controllers and memory devices. One embodiment for controlling host memory access with a memory device includes receiving at least one command from a host and controlling execution of the at least one command with the memory device.Type: GrantFiled: December 2, 2014Date of Patent: November 7, 2017Assignee: Micron Technology, Inc.Inventors: Neal A. Galbo, Peter Feeley, William H. Radke, Victor Y. Tsai, Robert N. Leibowitz
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Patent number: 9588697Abstract: The present disclosure includes methods, devices, and systems for controlling a memory device. One method for controlling a memory device embodiment includes storing device class dependent information and a command in one or more of host system memory and host controller memory, setting a pointer to the command in a register in a host controller, directing access to the one or more of host system memory and host controller memory with the memory device via the host controller; and executing the command with the memory device.Type: GrantFiled: May 21, 2015Date of Patent: March 7, 2017Assignee: Micron Technology, Inc.Inventors: Peter Feeley, Robert N. Leibowitz, William H. Radke, Neal A. Galbo, Victor Y. Tsai
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Publication number: 20160364179Abstract: The present disclosure includes apparatuses and methods for command queuing. A number of embodiments include receiving a queued command request at a memory system from a host, sending a command response from the memory system to the host that indicates the memory system is ready to receive a command in a command queue of the memory system, and receiving, in response to sending the command response, a command descriptor block for the command at the memory system from the host.Type: ApplicationFiled: August 25, 2016Publication date: December 15, 2016Inventors: Victor Y. Tsai, Danilo Caraccio, Daniele Balluchi, Neal A. Galbo, Robert Warren
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Patent number: 9454310Abstract: The present disclosure includes apparatuses and methods for command queuing. A number of embodiments include receiving a queued command request at a memory system from a host, sending a command response from the memory system to the host that indicates the memory system is ready to receive a command in a command queue of the memory system, and receiving, in response to sending the command response, a command descriptor block for the command at the memory system from the host.Type: GrantFiled: February 14, 2014Date of Patent: September 27, 2016Assignee: Micron Technology, Inc.Inventors: Victor Y. Tsai, Danilo Caraccio, Daniele Balluchi, Neal A. Galbo, Robert Warren
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Publication number: 20160154747Abstract: The present disclosure includes methods, devices, and systems for state change in systems having devices coupled in a chained configuration. A number of embodiments include a host and a number of devices coupled to the host in a chained configuration. The chained configuration includes at least one device that is not directly coupled to the host. The at least one device that is not directly coupled to the host is configured to change from a first communication state to a second communication state responsive to receipt of a command from the host.Type: ApplicationFiled: January 11, 2016Publication date: June 2, 2016Inventors: William H. Radke, Victor Y. Tsai, James Cooke, Neal A. Galbo, Peter Feeley
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Patent number: 9342371Abstract: The present disclosure includes boot partitions in memory devices and systems, and methods associated therewith. One or more embodiments include an array of memory cells, wherein the array includes a boot partition and a number of additional partitions. Sequential logical unit identifiers are associated with the additional partitions, and a logical unit identifier that is not in sequence with the sequential logical unit identifiers is associated with the boot partition.Type: GrantFiled: May 15, 2014Date of Patent: May 17, 2016Assignee: Micron Technology, Inc.Inventors: Neal A. Galbo, Victor Y. Tsai, William H. Radke, Krishnam R. Datla