Patents by Inventor Neal Callan

Neal Callan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8015540
    Abstract: The present invention is directed to a method and system of intelligent dummy filling placement to reduce inter-layer capacitance caused by overlaps of dummy filling area on successive layers. The method and system treats each consecutive pair of layers together so as to minimize dummy filling overlaps between each layer. In particular, dummy fill features on each layer may be placed in a checkerboard pattern to avoid overlaps. As such, the present invention may eliminate large overlap area of the dummy patterns on consecutive layers by utilizing intelligent dummy filling placement.
    Type: Grant
    Filed: May 30, 2008
    Date of Patent: September 6, 2011
    Assignee: LSI Corporation
    Inventors: Kunal N. Taravade, Neal Callan, Paul G. Filseth
  • Patent number: 7738078
    Abstract: The present invention provides an optimized direct write lithography system using optical mirrors. That is, a maskless lithography system is provided. The maskless direct-write lithography system provided uses an array of mirrors configured to operate in a tilting mode, a piston-displacement mode, or both in combination. The controlled mirror array is used as a substitute for the traditional chrome on glass masks. In order to avoid constraining the system to forming edges of patterns aligned with the array of mirrors, gray-scale techniques are used for subpixel feature placement. The direct-writing of a pattern portion may rely on a single mirror mode or a combination of modes.
    Type: Grant
    Filed: June 27, 2007
    Date of Patent: June 15, 2010
    Assignee: LSI Corporation
    Inventors: Nicholas K. Eib, Ebo Croffie, Neal Callan
  • Patent number: 7499146
    Abstract: The tilt and position of individually controllable element are simultaneously adjusted to allow a greater range of contrasts to be achieved. This can also be used to compensate for cupping of individually controllable elements. Simultaneous adjustment of both the position and tilt of the individually controllable elements can be achieved by two electrodes operable over a range of values.
    Type: Grant
    Filed: October 19, 2005
    Date of Patent: March 3, 2009
    Assignees: ASML Netherlands B.V., ASML Holding N.V., LSI Logic Corporation
    Inventors: Kars Zeger Troost, Johannes Jacobus Matheus Baselmans, Arno Jan Bleeker, Louis Markoya, Neal Callan, Nicholas K. Eib
  • Publication number: 20080235643
    Abstract: The present invention is directed to a method and system of intelligent dummy filling placement to reduce inter-layer capacitance caused by overlaps of dummy filling area on successive layers. The method and system treats each consecutive pair of layers together so as to minimize dummy filling overlaps between each layer. In particular, dummy fill features on each layer may be placed in a checkerboard pattern to avoid overlaps. As such, the present invention may eliminate large overlap area of the dummy patterns on consecutive layers by utilizing intelligent dummy filling placement.
    Type: Application
    Filed: May 30, 2008
    Publication date: September 25, 2008
    Inventors: Kunal N. Taravade, Neal Callan, Paul G. Filseth
  • Patent number: 7396760
    Abstract: The present invention is directed to a method and system of intelligent dummy filling placement to reduce inter-layer capacitance caused by overlaps of dummy filling area on successive layers. The method and system treats each consecutive pair of layers together so as to minimize dummy filling overlaps between each layer. In particular, dummy fill features on each layer may be placed in a checkerboard pattern to avoid overlaps. As such, the present invention may eliminate large overlap area of the dummy patterns on consecutive layers by utilizing intelligent dummy filling placement.
    Type: Grant
    Filed: November 17, 2004
    Date of Patent: July 8, 2008
    Assignee: LSI Corporation
    Inventors: Kunal N. Taravade, Neal Callan, Paul G. Filseth
  • Patent number: 7376260
    Abstract: A method for performing post-optical proximity correction (OPC) multi layer overlay quality inspection includes the steps of generating a virtual target mask for a first mask and a second mask overlay using design rules at least partially defining the relationship between the first mask and the second mask; creating a composite aerial image representing a first mask image formed from the first mask and a second mask image formed by the second mask by performing imaging of the first mask and the second mask and overlaying the second mask image onto the first mask image; generating an overlay image map of the composite aerial image using the design rules at least partially defining the relationship between the first mask and the second mask; and comparing the overlay image map area and the virtual target mask area.
    Type: Grant
    Filed: December 14, 2004
    Date of Patent: May 20, 2008
    Assignee: LSI Logic Corporation
    Inventors: Neal Callan, Nadya Belova
  • Patent number: 7313508
    Abstract: The invention provides a method of performing process window compliant corrections of a design layout. The invention includes an operator performing the following steps: (1) simulating Develop Inspect Critical Dimension (DI CD) at best exposure conditions using the provided original layout pattern; (2) simulating DI CD at predefined boundary exposure conditions using the provided original layout pattern; (3) if the DI CD from step (1) meets the target DI CD definition, and the DI CD from step (2) meets process window specifications, convergence takes place; and (4) modifying the layout pattern and repeating steps (2) through (3) until DI CD from step (2) reaches the specification limit if any portion of step (3) is not achieved.
    Type: Grant
    Filed: December 27, 2002
    Date of Patent: December 25, 2007
    Assignee: LSI Corporation
    Inventors: Ebo Croffie, Colin Yates, Nicholas Eib, Christopher Neville, Mario Garza, Neal Callan
  • Publication number: 20070247604
    Abstract: The present invention provides an optimized direct write lithography system using optical mirrors. That is, a maskless lithography system is provided. The maskless direct-write lithography system provided uses an array of mirrors configured to operate in a tilting mode, a piston-displacement mode, or both in combination. The controlled mirror array is used as a substitute for the traditional chrome on glass masks. In order to avoid constraining the system to forming edges of patterns aligned with the array of mirrors, gray-scale techniques are used for subpixel feature placement. The direct-writing of a pattern portion may rely on a single mirror mode or a combination of modes.
    Type: Application
    Filed: June 27, 2007
    Publication date: October 25, 2007
    Inventors: Nicholas Eib, Ebo Croffie, Neal Callan
  • Patent number: 7270942
    Abstract: The present invention provides an optimized direct write lithography system using optical mirrors. That is, a maskless lithography system is provided. The maskless direct-write lithography system provided uses an array of mirrors configured to operate in a tilting mode, a piston-displacement mode, or both in combination. The controlled mirror array is used as a substitute for the traditional chrome on glass masks. In order to avoid constraining the system to forming edges of patterns aligned with the array of mirrors, gray-scale techniques are used for subpixel feature placement. The direct-writing of a pattern portion may rely on a single mirror mode or a combination of modes.
    Type: Grant
    Filed: April 14, 2004
    Date of Patent: September 18, 2007
    Assignee: LSI Corporation
    Inventors: Nicholas K. Eib, Ebo Croffie, Neal Callan
  • Patent number: 7149340
    Abstract: A method and system for detecting defects in a physical mask used for fabricating a semiconductor device having multiple layers is disclosed, where each layer has a corresponding mask. The method and system include receiving a digital image of the mask, and automatically detecting edges of the mask in the image using pattern recognition. The detected edges, which are stored in a standard format, are imported along with processing parameters into a process simulator that generates an estimated aerial image of the silicon layout that would be produced by a scanner using the mask and the parameters. The estimated aerial image is then compared to an intended aerial image of the same layer, and any differences found that are greater than predefined tolerances are determined to horizontal defects. In addition, effects that the horizontal defects may have on adjacent layers are analyzed to discover vertical defects.
    Type: Grant
    Filed: September 20, 2002
    Date of Patent: December 12, 2006
    Assignee: LSI Logic Corporation
    Inventors: Paul Filseth, Neal Callan, Kunal Taravade, Mario Garza
  • Publication number: 20060203220
    Abstract: The tilt and position of individually controllable element are simultaneously adjusted to allow a greater range of contrasts to be achieved. This can also be used to compensate for cupping of individually controllable elements. Simultaneous adjustment of both the position and tilt of the individually controllable elements can be achieved by two electrodes operable over a range of values.
    Type: Application
    Filed: October 19, 2005
    Publication date: September 14, 2006
    Applicants: ASML Netherlands B.V., ASML Holding N.V., LSI Logic Corporation
    Inventors: Kars Troost, Johannes Baselmans, Arno Bleeker, Louis Markoya, Neal Callan, Nicholas Eib
  • Publication number: 20060105564
    Abstract: The present invention is directed to a method and system of intelligent dummy filling placement to reduce inter-layer capacitance caused by overlaps of dummy filling area on successive layers. The method and system treats each consecutive pair of layers together so as to minimize dummy filling overlaps between each layer. In particular, dummy fill features on each layer may be placed in a checkerboard pattern to avoid overlaps. As such, the present invention may eliminate large overlap area of the dummy patterns on consecutive layers by utilizing intelligent dummy filling placement.
    Type: Application
    Filed: November 17, 2004
    Publication date: May 18, 2006
    Inventors: Kunal Taravade, Neal Callan, Paul Filseth
  • Publication number: 20050275814
    Abstract: The present invention provides methods and apparatus for accomplishing a optical direct write phase shift lithography. A lithography system and method are provided wherein a mirror array is configured to generate vortex phase shift optical patterns that are directed onto a photosensitive layer of a substrate. The lithography methods and systems facilitate pattern transfer using such vortex phase shift exposure patterns.
    Type: Application
    Filed: December 14, 2004
    Publication date: December 15, 2005
    Inventors: Nicholas Eib, Ebo Croffie, Neal Callan
  • Publication number: 20050237508
    Abstract: The present invention provides methods and apparatus for accomplishing a phase shift lithography process using a off axis light to reduce the effect of zero order light to improve the process window for maskless phase shift lithography systems and methodologies. A lithography system is provided. The lithography system provided uses off axis light beams projected onto a mirror array configured to generate a phase shift optical image pattern. This pattern is projected onto a photoimageable layer formed on the target substrate to facilitate pattern transfer.
    Type: Application
    Filed: December 14, 2004
    Publication date: October 27, 2005
    Inventors: Nicholas Eib, Ebo Croffie, Neal Callan
  • Publication number: 20050153246
    Abstract: The present invention provides methods and apparatus for accomplishing a strong phase shift direct write lithography process using reconfigurable optical mirrors. A maskless lithography system is provided. The maskless direct-write lithography system provided uses an array of mirrors configured to operate in a tilting mode, a piston-displacement mode, or both in combination. The controlled mirror array is used to generate strong phase shift optical patterns which are directed onto a photoimageable layer of a substrate in order to facilitate pattern transfer. In order to avoid constraining the system to forming edges of patterns aligned with the array of mirrors, gray-scale techniques are used for subpixel feature placement.
    Type: Application
    Filed: November 19, 2004
    Publication date: July 14, 2005
    Inventors: Nicholas Eib, Ebo Croffle, Neal Callan
  • Publication number: 20050151949
    Abstract: The present invention provides methods and apparatus for accomplishing a phase shift lithography process using a blocker to block zero order light to improve image quality for phase shift lithography systems and methodologies. A maskless lithography system is provided. The lithography system provided uses a phase shift pattern generator which projects a phase shift image pattern along an optical path onto a photoimageable layer of a substrate in order to facilitate pattern transfer. A blocking element is interposed in the optical path to block zero order light in the image pattern, thereby improving image quality.
    Type: Application
    Filed: November 12, 2004
    Publication date: July 14, 2005
    Inventors: Nicholas Eib, Ebo Croffie, Christopher Neville, Neal Callan
  • Publication number: 20050100802
    Abstract: A method for performing post-optical proximity correction (OPC) multi layer overlay quality inspection includes the steps of generating a virtual target mask for a first mask and a second mask overlay using design rules at least partially defining the relationship between the first mask and the second mask; creating a composite aerial image representing a first mask image formed from the first mask and a second mask image formed by the second mask by performing imaging of the first mask and the second mask and overlaying the second mask image onto the first mask image; generating an overlay image map of the composite aerial image using the design rules at least partially defining the relationship between the first mask and the second mask; and comparing the overlay image map area and the virtual target mask area.
    Type: Application
    Filed: December 14, 2004
    Publication date: May 12, 2005
    Inventors: Neal Callan, Nadya Belova
  • Publication number: 20050088640
    Abstract: The present invention provides an optimized direct write lithography system using optical mirrors. That is, a maskless lithography system is provided. The maskless direct-write lithography system provided uses an array of mirrors configured to operate in a tilting mode, a piston-displacement mode, or both in combination. The controlled mirror array is used as a substitute for the traditional chrome on glass masks. In order to avoid constraining the system to forming edges of patterns aligned with the array of mirrors, gray-scale techniques are used for subpixel feature placement. The direct-writing of a pattern portion may rely on a single mirror mode or a combination of modes.
    Type: Application
    Filed: April 14, 2004
    Publication date: April 28, 2005
    Inventors: Nicholas Eib, Ebo Croffie, Neal Callan
  • Patent number: 6864020
    Abstract: An attenuated phase shift mask is formed using a non-linear optical material for both fiducial features and pattern features. The non-linear optical material selected has predetermined transmission at the actinic exposure wavelength and a smaller transmission at the fiducial recognition wavelengths.
    Type: Grant
    Filed: December 24, 2002
    Date of Patent: March 8, 2005
    Assignee: LSI Logic Corporation
    Inventors: Kunal Taravade, Neal Callan
  • Publication number: 20050019673
    Abstract: A phase shift mask which includes an etched quartz region that provides a 180 degree phase shift, and an attenuated film which provides a 0 (or 360) degree phase shift. The phase shift mask provides performance comparable to CPL, while at the same time, avoiding the problems and manufacturability issues associated with EDA. The phase shift mask has better contrast than CPL, and a process window that is comparable to both CPL and alternating phase shift masks. The phase shift mask that does not require a second critical write, as is the case with CPL, does not need a second mask to eliminate unwanted patterns resulting from phase edges, and does not need a complicated EDA solution (like CPL). Finally, the phase shift mask is simple to manufacture, requiring only a single write step if employed with the back-side exposure technique which is well known in the mask-making industry.
    Type: Application
    Filed: July 22, 2003
    Publication date: January 27, 2005
    Inventors: Kunal Taravade, Ebo Croffie, Neal Callan