Abstract: In some cases, a wireless sensor device includes a radio frequency (RF) processor system. The RF processor system includes a forward error correction (FEC) device, a digital signal processor (DSP) device and a shared memory device that is connected between the FEC device and the DSP device. The DSP device is directly connected to the shared memory device and configured to selectively access individual memory elements of the shared memory device. The FEC device is directly connected to the shared memory device and configured to collectively access arrays of memory elements of the shared memory device.

Abstract: In some aspects of what is described, a wireless sensor device includes a radio frequency (RF) processor system. The RF processor system includes a very large instruction word (VLIW) processor device that has multiple execution units. The RF processor system also includes storage units and an interconnect device. The storage units store instruction words to be routed to the execution units. The interconnect device provides connectivity between the storage units and the execution units. The interconnect device is adapted to route instruction words from storage units to respective execution units according to routing indices for each clock cycle of the VLIW device.

Abstract: A reconfigurable digital signal filter processing unit for use in a communication device is provided. The reconfigurable filters processor can implement different filter topologies to adapt to a range or wireless technology characteristics. The reconfigurable filter processor comprises a plurality of filter blocks whose inputs can be selected based on the desired configuration of the filter. Each filter block applies a transfer function to a received signal to achieve a desired filtering function.

Abstract: An apparatus, and an associated method, for synthesizing a discrete-valued oscillating signal. Input parameters are provided that are determinative of the frequency, gain, and phase characteristics of the resultant, oscillating signal. The discrete-valued, oscillating signal is combinable with another signal to form a mixed signal of a desired frequency, gain, and phase characteristic using a single complex multiplication operation.

Abstract: An apparatus, and an associated method, for synthesizing a discrete-valued oscillating signal. Input parameters are provided that are determinative of the frequency, gain, and phase characteristics of the resultant, oscillating signal. The discrete-valued, oscillating signal is combinable with another signal to form a mixed signal of a desired frequency, gain, and phase characteristic using a single complex multiplication operation.

Abstract: A reconfigurable digital signal filter processing unit for use in a communication device is provided. The reconfigurable filters processor can implement different filter topologies to adapt to a range or wireless technology characteristics. The reconfigurable filter processor comprises a plurality of filter blocks whose inputs can be selected based on the desired configuration of the filter. Each filter block applies a transfer function to a received signal to achieve a desired filtering function.