Abstract: The present invention enhances the performance of a clock and data recovery (CDR) circuit by employing look-ahead techniques to produce a low latency timing adjustment. In one example of the invention employed in a CDR circuit having a decimation filter processing the CDR's phase detector output, the invention uses the most significant bits of the decimation filter output to quickly determine a look-ahead adjustment.

Abstract: The present invention enhances the performance of a clock and data recovery (CDR) circuit by employing look-ahead techniques to produce a low latency timing adjustment. In one example of the invention employed in a CDR circuit having a decimation filter processing the CDR's phase detector output, the invention uses the most significant bits of the decimation filter output to quickly determine a look-ahead adjustment.

Abstract: A new class of fixed partial response targets are disclosed for use in a PRML magnetic medium read channel. The preferred embodiment exhibits an equalization response characterized by the polynomial 7+4*D−4*D2−5*D3−2*D4, where D represents the unit delay operator. This read channel target provides improved matching to the inherent magnetic channel over the known canonical class of targets (1−D)(1+D){circumflex over ( )}N, and thereby reduces equalization losses. The improved spectral matching reduces amplification of noise in the channel, thereby reducing bit-error-rates. The new class of targets also exhibits a spectral null at DC, reducing problems for offset cancellation circuitry and making the disk drive less sensitive to thermal asperities. It also exhibits a spectral depression rather than a spectral null at the Nyquist frequency, making quasi-catastrophic error sequences virtually impossible.

Abstract: A punctured maximum transition run (PMTR) code includes transition-allowed bit slots and transition-disallowed bit slots. Each of the transition-allowed bit slots is a bit slot in which a bit representing a third consecutive transition of a logic signal can occur whereas each of the transition-disallowed bit slots is a bit slot in which a bit representing a third consecutive transition of a logic signal cannot occur. There are at least two transition-allowed bit slots which are adjacent to each other. The transition occurs from a high logic level to a low logic level, or from a low logic level to a high logic level.

Abstract: A Viterbi detector, illustratively used in a magnetic read channel integrated circuit, provides a "final" output signal as to the most likely state of the input data signal. The Viterbi detector typically utilizes branch metric generation, add-compare-select operations, and a path memory. The best state is found prior to the final decision, and is based on the state having the lowest state metric. The best state information is used to choose an output from the path memory, so that the output data from the end of the path memory line associated with the best state is selected as the final decision of the Viterbi detector. This allows for shortening the length of the path memory in typical applications. At least one control loop may also be controlled by preliminary decisions based on the best state.

Abstract: A method of decoding a sequence of samples received over a communications channel, such as a partial response channel, in which the sequence represents a length k binary bit stream encoded as a sequence of bipolar symbols comprised of q groups of L symbols, each length L group of said symbols corresponding to one of 2.sup.m subwords having a predetermined block digital sum. The decoding method makes use of the structure of the encoding method by finding, in one illustrative embodiment, for each group of L samples, the maximum likelihood path through a time varying trellis supporting the sets of subwords having predetermined block digital sums to identify said subwords; recording the state metrics and branch metrics for each path and identifying, from the metrics the maximum likelihood path, the order of concatenation of the subwords.