Patents by Inventor Nedialko Slavov

Nedialko Slavov has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8624390
    Abstract: An electronic device comprises a plurality of integrated circuit dies mounted on different areas of a carrier. The carrier is folded into a plurality of layers, each layer comprising one of the different areas of the carrier and one of the integrated circuit dies, such that the plurality of integrated circuit dies form a stack. Adjacent surfaces of neighboring layers are fixed together, for example by an adhesive layer, and the folded carrier and the integrated circuit dies are embedded in a molded material.
    Type: Grant
    Filed: December 8, 2010
    Date of Patent: January 7, 2014
    Assignee: ST-Ericsson SA
    Inventor: Nedialko Slavov
  • Patent number: 8471627
    Abstract: A method of optimizing cross current in class D amplifiers and simultaneously minimizing the harmonic distortion is provided. The method overcomes the problem of using the limited speed voltage comparators often used in cross current preventing circuits. Method embodiments are based on introducing a replica amplifier with a current sensor matched to a main amplifier. The duration of a sensed cross current within the replica amplifier is compared by a current comparator with a small enough reference current. The comparator output generates a pulse with a duration equal to the duration of the cross current event in the replica amplifier. The duration of that pulse is measured and used to generate a dead time pulse for blanking amplifier pre-driver inputs.
    Type: Grant
    Filed: April 27, 2010
    Date of Patent: June 25, 2013
    Assignee: ST-Ericsson SA
    Inventor: Nedialko Slavov
  • Publication number: 20120261814
    Abstract: An electronic device comprises a plurality of integrated circuit dies mounted on different areas of a carrier. The carrier is folded into a plurality of layers, each layer comprising one of the different areas of the carrier and one of the integrated circuit dies, such that the plurality of integrated circuit dies form a stack. Adjacent surfaces of neighbouring layers are fixed together, for example by an adhesive layer, and the folded carrier and the integrated circuit dies are embedded in a moulded material.
    Type: Application
    Filed: December 8, 2010
    Publication date: October 18, 2012
    Applicant: ST-ERICSSON SA
    Inventor: Nedialko Slavov
  • Publication number: 20120056670
    Abstract: A method of optimising cross current in class D amplifiers and simultaneously minimizing the harmonic distortion is provided. The method overcomes the problem of using the limited speed voltage comparators often used in cross current preventing circuits. Method embodiments are based on introducing a replica amplifier with a current sensor matched to a main amplifier. The duration of a sensed cross current within the replica amplifier is compared by a current comparator with a small enough reference current. The comparator output generates a pulse with a duration equal to the duration of the cross current event in the replica amplifier. The duration of that pulse is measured and used to generate a dead time pulse for blanking amplifier pre-driver inputs.
    Type: Application
    Filed: April 27, 2010
    Publication date: March 8, 2012
    Applicant: ST-ERICSSON SA
    Inventor: Nedialko Slavov