Patents by Inventor Neel A. Bhatt

Neel A. Bhatt has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10754834
    Abstract: A method and system for backing up data is provided. The method includes storing a first plurality of data units in a backup storage, as a result of a fingerprint database being available, the first plurality of data units being deduplicated through application of the fingerprint database. The method includes storing a second plurality of data units in the backup storage, as a result of the fingerprint database being unavailable, wherein at least one step of the method is executed through a processor.
    Type: Grant
    Filed: June 15, 2013
    Date of Patent: August 25, 2020
    Assignee: VERITAS TECHNOLOGIES LLC
    Inventors: Deepak Patil, Graham Bromley, Neel Bhatt, Stephen Gipp
  • Patent number: 10282256
    Abstract: A method for backing up data is provided. The method includes deduplicating a first plurality of data units during a backup operation through application of a first deduplication service and a fingerprint database. The method includes logging a second plurality of data units in a journal, during the backup operation. The logging is in response to a failure of the first deduplication service and wherein at least one method operation is executed through a processor.
    Type: Grant
    Filed: June 15, 2013
    Date of Patent: May 7, 2019
    Assignee: Veritas Technologies LLC
    Inventors: Deepak Patil, Neel Bhatt, Stephen Gipp
  • Patent number: 9256612
    Abstract: A computer-implemented method for managing references in deduplicating data systems may include (1) identifying a first instance of a data segment stored within a deduplicating data system that reduces redundant data storage by storing at least two data objects such that each of the two data objects references the first instance of the data segment, (2) identifying an additional data object to be stored by the deduplicating data system that includes the data segment, (3) determining whether a reference limit associated with the first instance of the data segment has been reached, and (4) storing, based at least in part on determining that the reference limit associated with the first instance of the data segment has been reached, a second instance of the data segment within the deduplicating data system. Various other methods, systems, and computer-readable media are also disclosed.
    Type: Grant
    Filed: June 11, 2013
    Date of Patent: February 9, 2016
    Assignee: Symantec Corporation
    Inventors: Neel Bhatt, Stephan Gipp
  • Patent number: 8236703
    Abstract: Methods for removing contaminants from a semiconductor device that includes a plurality of aluminum-comprising bond pads on a semiconductor surface of a substrate. A plurality of aluminum-including bond pads are formed on the semiconductor surface of the substrate. A patterned passivation layer is then formed on the semiconductor surface, wherein the patterned passivation layer provides an exposed area for the plurality of bond pads. Wet etching with a basic etch solution is used to etch a surface of the exposed area of the aluminum-including bond pads, wherein the wet etching removes at least 100 Angstroms from the surface of the bond pads to form a cleaned surface.
    Type: Grant
    Filed: September 11, 2008
    Date of Patent: August 7, 2012
    Assignee: Texas Instruments Incorporated
    Inventors: Alfred J. Griffin, Jr., Lisa A. Fritz, Lin Li, Lee Alan Stringer, Neel A. Bhatt, John Paul Campbell, Stephen Arlon Meisner, Charles Leighton
  • Publication number: 20090068847
    Abstract: Methods for removing contaminants from a semiconductor device that includes a plurality of aluminum-comprising bond pads on a semiconductor surface of a substrate. A plurality of aluminum-including bond pads are formed on the semiconductor surface of the substrate. A patterned passivation layer is then formed on the semiconductor surface, wherein the patterned passivation layer provides an exposed area for the plurality of bond pads. Wet etching with a basic etch solution is used to etch a surface of the exposed area of the aluminum-including bond pads, wherein the wet etching removes at least 100 Angstroms from the surface of the bond pads to form a cleaned surface.
    Type: Application
    Filed: September 11, 2008
    Publication date: March 12, 2009
    Inventors: Alfred J. Griffin, JR., Lisa A. Fritz, Lin Li, Lee Alan Stringer, Neel A. Bhatt, John Paul Campbell, Stephen Arlon Meisner, Charles Leighton
  • Patent number: 7452818
    Abstract: The disclosure provides a method for manufacturing a semiconductor device. The method, in one embodiment, includes forming semiconductor features (405, 410, 415, 420, 425, 430, 435, 440, 445) over a substrate (310), and then forming a layer of material (510) over the semiconductor features (405, 410, 415, 420, 425, 430, 435, 440, 445). This method further includes selectively etching portions of the layer of material (510) based upon a density or size of the semiconductor features (405, 410, 415, 420, 425, 430, 435, 440, 445) located thereunder, and then polishing remaining portions of the layer of material (510).
    Type: Grant
    Filed: March 30, 2007
    Date of Patent: November 18, 2008
    Assignee: Texas Instruments Incorporated
    Inventors: Kyle Hunt, Neel Bhatt, Asadd M. Hosein, Brian L. Vialpando, William R. Morrison
  • Publication number: 20080242007
    Abstract: The disclosure provides a method for manufacturing a semiconductor device. The method, in one embodiment, includes forming semiconductor features (405, 410, 415, 420, 425, 430, 435, 440, 445) over a substrate (310), and then forming a layer of material (510) over the semiconductor features (405, 410, 415, 420, 425, 430, 435, 440, 445). This method further includes selectively etching portions of the layer of material (510) based upon a density or size of the semiconductor features (405, 410, 415, 420, 425, 430, 435, 440, 445) located thereunder, and then polishing remaining portions of the layer of material (510).
    Type: Application
    Filed: March 30, 2007
    Publication date: October 2, 2008
    Applicant: Texas Instruments Incorporated
    Inventors: Kyle Hunt, Neel Bhatt, Asadd M. Hosein, Brian L. Vialpando, William R. Morrison