Patents by Inventor Neel Shah

Neel Shah has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10927911
    Abstract: An adjuster mechanism for a disc brake. The adjuster mechanism may include an outer piston and an inner piston. The outer piston may define a bore having a female thread, a non-threaded region, and a transition region. The non-threaded region may have a greater diameter than a minor diameter of the female thread. The minor diameter of the female thread in the transition region may progressively increase until it meets a major diameter of the female thread.
    Type: Grant
    Filed: April 17, 2019
    Date of Patent: February 23, 2021
    Assignee: Meritor Heavy Vehicle Braking Systems (UK) Limited
    Inventors: Neel Shah, Dave Hubbard, Sean Cleary, Refaat Malki
  • Patent number: 10927906
    Abstract: A brake pad, a disc brake, and a method of fitting a brake pad. At least one of a first brake pad and a second brake pad and corresponding support structures may have complementary profiles on circumferential faces thereof arranged so as to permit the brake pad to be inserted into a corresponding support structure in a transverse direction of the brake pad and at an angle to a circumferential direction of the support structure.
    Type: Grant
    Filed: June 1, 2018
    Date of Patent: February 23, 2021
    Assignee: Meritor Heavy Vehicle Braking Systems (UK) Limited
    Inventors: Dietmar Knoop, Neel Shah, Sean Cleary, Dave Hubbard
  • Patent number: 10859627
    Abstract: A processor, including: a core; system test circuitry, the system test circuitry to be locked during operational processor operation; reset circuitry including a kick-off test (KOT) input, the reset circuitry to detect a reset with the KOT input asserted, and to initiate an in-field system test (IFST) mode; a test interface controller to receive in IFST mode an encrypted test packet having a signature, verify the signature of the test packet, and decrypt the test packet; and IFST control circuitry to cause the system test circuitry to perform an IFST test according to the decrypted test packet and to log or report results.
    Type: Grant
    Filed: June 29, 2017
    Date of Patent: December 8, 2020
    Assignee: Intel Corporation
    Inventors: Sreejit Chakravarty, Oscar Mendoza, Ramasubramanian Rajamani, Bryan J. Gran, Sorin Iacobovici, Neel Shah, Michael Neve de Mevergnies, John Cruz Mejia, Amy L. Santoni
  • Publication number: 20200366487
    Abstract: Technologies disclosed herein provide an apparatus comprising a fuse controller coupled to an aggregator. The fuse controller includes a plurality of fuses for storing a unique identifier of a device and a first secured value of a first password associated with the unique identifier. The aggregator is to receive the unique identifier and the first secured value from the fuse controller, send the unique identifier to an unlock host, receive a second password from the unlock host, compute a second secured value of the second password using a security function, and unlock one or more privileged features on the device based on the first secured value corresponding to the second secured value. In a specific embodiment, the first secured value corresponds to the second secured value if the first password is equivalent to the second password.
    Type: Application
    Filed: August 3, 2020
    Publication date: November 19, 2020
    Applicant: Intel Corporation
    Inventors: Michael Neve De Mevergnies, Neel Shah, Kumar Dwarakanath, Fred Bolay, Mukesh Kataria
  • Patent number: 10801569
    Abstract: A disc brake having an arrangement to prevent or inhibit fitting of first and second brake pads individually or in combination with friction material facing away from the rotor. A first formation of a first brake pad interacts with a corresponding first formation of a brake actuation mechanism for the first brake pad to be fitted in the first mounting structure. A second formation of the second brake pad interacts with a corresponding second formation of a carrier for the second brake pad to be fitted in the second mounting structure.
    Type: Grant
    Filed: November 28, 2018
    Date of Patent: October 13, 2020
    Assignee: Meritor Heavy Vehicle Braking Systems (UK) Limited
    Inventors: Matthew McGinn, Neel Shah
  • Patent number: 10746242
    Abstract: A disc brake that includes a caliper having a housing, an actuation mechanism, and a cover plate. The cover plate is releasably mounted to an outboard facing surface of a housing of the caliper by at least one fastening member that is insertable in a generally inboard direction and removable in a generally outboard direction.
    Type: Grant
    Filed: November 27, 2018
    Date of Patent: August 18, 2020
    Assignee: Meritor Heavy Vehicle Braking Systems (UK) Limited
    Inventors: Neel Shah, Adrian Kinder
  • Patent number: 10491381
    Abstract: A processor, including: a core; system test circuitry, the system test circuitry configured to be locked except during an in-field system test (IFST) mode; IFST control circuitry; and a test interface controller, including: a data interface to receive a test packet; a parser to parse the test packet into a key, a signature, and a stored hash-of-hashes; a decryption circuit to decrypt the signature according to the key and to generate a computed hash-of-hashes; a hash circuit to verify the stored hash-of-hashes against the computed hash-of-hashes; and an IFST interface, wherein the test interface controller is to signal the IFST control circuitry to place the system test circuitry in IFST mode.
    Type: Grant
    Filed: June 29, 2017
    Date of Patent: November 26, 2019
    Assignee: Intel Corporation
    Inventors: Neel Shah, Kirk S. Yap, Amy L. Santoni, Michael Neve de Mevergnies, Oscar Mendoza, Sreejit Chakravarty, Ramasubramanian Rajamani, Bryan J. Gran, Sorin Iacobovici
  • Publication number: 20190331185
    Abstract: An adjuster mechanism for a disc brake. The adjuster mechanism may include an outer piston and an inner piston. The outer piston may define a bore having a female thread, a non-threaded region, and a transition region. The non-threaded region may have a greater diameter than a minor diameter of the female thread. The minor diameter of the female thread in the transition region may progressively increase until it meets a major diameter of the female thread.
    Type: Application
    Filed: April 17, 2019
    Publication date: October 31, 2019
    Applicant: Meritor Heavy Vehicle Braking Systems (UK) Limited
    Inventors: Neel Shah, Dave Hubbard, Sean Cleary, Refaat Malki
  • Publication number: 20190162259
    Abstract: A disc brake having an arrangement to prevent or inhibit fitting of first and second brake pads individually or in combination with friction material facing away from the rotor. A first formation of a first brake pad interacts with a corresponding first formation of a brake actuation mechanism for the first brake pad to be fitted in the first mounting structure. A second formation of the second brake pad interacts with a corresponding second formation of a carrier for the second brake pad to be fitted in the second mounting structure.
    Type: Application
    Filed: November 28, 2018
    Publication date: May 30, 2019
    Applicant: Meritor Heavy Vehicle Braking Systems (UK) Limited
    Inventors: Matthew McGinn, Neel Shah
  • Publication number: 20190162258
    Abstract: A disc brake that includes a caliper having a housing, an actuation mechanism, and a cover plate. The cover plate is releasably mounted to an outboard facing surface of a housing of the caliper by at least one fastening member that is insertable in a generally inboard direction and removable in a generally outboard direction.
    Type: Application
    Filed: November 27, 2018
    Publication date: May 30, 2019
    Applicant: Meritor Heavy Vehicle Braking Systems (UK) Limited
    Inventors: Neel Shah, Adrian Kinder
  • Patent number: 10289779
    Abstract: A system for verifying functionality of a circuit design under test (DUT) includes a control station comprising at least one graphical user interface (GUI); and at least one emulator in communication with the control station. The emulator may include a verification component and a register abstraction layer (RAL), wherein the verification component is configured to implement the DUT and the RAL is configured to implement one or more communication interfaces of the DUT. A traffic predictor in communication with the at least one emulator may monitor data traffic over the communication interface between the at least one emulator and the DUT, predict a response to the data traffic by the DUT, monitor a response to the traffic by the DUT, and determine if the response by the DUT matches the predicted response.
    Type: Grant
    Filed: April 18, 2017
    Date of Patent: May 14, 2019
    Assignee: Raytheon Company
    Inventors: Luke Wolff, Neel Shah
  • Publication number: 20190007212
    Abstract: Technologies disclosed herein provide an apparatus comprising a fuse controller coupled to an aggregator. The fuse controller includes a plurality of fuses for storing a unique identifier of a device and a first secured value of a first password associated with the unique identifier. The aggregator is to receive the unique identifier and the first secured value from the fuse controller, send the unique identifier to an unlock host, receive a second password from the unlock host, compute a second secured value of the second password using a security function, and unlock one or more privileged features on the device based on the first secured value corresponding to the second secured value. In a specific embodiment, the first secured value corresponds to the second secured value if the first password is equivalent to the second password.
    Type: Application
    Filed: June 30, 2017
    Publication date: January 3, 2019
    Inventors: Michael Neve de Mevergnies, Neel Shah, Kumar Dwarakanath, Fred Bolay, Mukesh Kataria
  • Publication number: 20190004112
    Abstract: A processor, including: a core; system test circuitry, the system test circuitry to be locked during operational processor operation; reset circuitry including a kick-off test (KOT) input, the reset circuitry to detect a reset with the KOT input asserted, and to initiate an in-field system test (IFST) mode; a test interface controller to receive in IFST mode an encrypted test packet having a signature, verify the signature of the test packet, and decrypt the test packet; and IFST control circuitry to cause the system test circuitry to perform an IFST test according to the decrypted test packet and to log or report results.
    Type: Application
    Filed: June 29, 2017
    Publication date: January 3, 2019
    Inventors: Sreejit Chakravarty, Oscar Mendoza, Ramasubramanian Rajamani, Bryan J. Gran, Sorin Iacobovici, Neel Shah, Michael Neve de Mevergnies, John Cruz Mejia, Amy L. Santoni
  • Publication number: 20190007200
    Abstract: A processor, including: a core; system test circuitry, the system test circuitry configured to be locked except during an in-field system test (IFST) mode; IFST control circuitry; and a test interface controller, including: a data interface to receive a test packet; a parser to parse the test packet into a key, a signature, and a stored hash-of-hashes; a decryption circuit to decrypt the signature according to the key and to generate a computed hash-of-hashes; a hash circuit to verify the stored hash-of-hashes against the computed hash-of-hashes; and an IFST interface, wherein the test interface controller is to signal the IFST control circuitry to place the system test circuitry in IFST mode.
    Type: Application
    Filed: June 29, 2017
    Publication date: January 3, 2019
    Inventors: Neel Shah, Kirk S. Yap, Amy L. Santoni, Michael Neve de Mevergnies, Oscar Mendoza, Sreejit Chakravarty, Ramasubramanian Rajamani, Bryan J. Gran, Sorin Iacobovici
  • Publication number: 20180347649
    Abstract: A brake pad, a disc brake, and a method of fitting a brake pad. At least one of a first brake pad and a second brake pad and corresponding support structures may have complementary profiles on circumferential faces thereof arranged so as to permit the brake pad to be inserted into a corresponding support structure in a transverse direction of the brake pad and at an angle to a circumferential direction of the support structure.
    Type: Application
    Filed: June 1, 2018
    Publication date: December 6, 2018
    Applicant: Meritor Heavy Vehicle Braking Systems (UK) Limited
    Inventors: Dietmar Knoop, Neel Shah
  • Publication number: 20180349650
    Abstract: Embodiments herein relate to a die to form a system-on-chip (SOC) with one or more other dies, with a policy arbitrator disposed on the die to manage security policies of the plurality of dies of the SOC, where the PA is to receive information about a security policy and a die type from a first of the one or more other dies, compare at least the received information about the security policy and the die type of the first other die with a security policy and a die type of the die, determine, based on the comparison, a common security policy for the plurality of dies of the SOC, and transmit the determined common security policy and the die type of the die to at least a second of the one or more other dies.
    Type: Application
    Filed: June 6, 2017
    Publication date: December 6, 2018
    Inventors: NEEL SHAH, MICHAEL NEVE DE MEVERGNIES
  • Patent number: 10146964
    Abstract: Embodiments herein relate to a die to form a system-on-chip (SOC) with one or more other dies, with a policy arbitrator disposed on the die to manage security policies of the plurality of dies of the SOC, where the PA is to receive information about a security policy and a die type from a first of the one or more other dies, compare at least the received information about the security policy and the die type of the first other die with a security policy and a die type of the die, determine, based on the comparison, a common security policy for the plurality of dies of the SOC, and transmit the determined common security policy and the die type of the die to at least a second of the one or more other dies.
    Type: Grant
    Filed: June 6, 2017
    Date of Patent: December 4, 2018
    Assignee: INTEL CORPORATION
    Inventors: Neel Shah, Michael Neve De Mevergnies
  • Publication number: 20180300431
    Abstract: A system for verifying functionality of a circuit design under test (DUT) includes a control station comprising at least one graphical user interface (GUI); and at least one emulator in communication with the control station. The emulator may include a verification component and a register abstraction layer (RAL), wherein the verification component is configured to implement the DUT and the RAL is configured to implement one or more communication interfaces of the DUT. A traffic predictor in communication with the at least one emulator may monitor data traffic over the communication interface between the at least one emulator and the DUT, predict a response to the data traffic by the DUT, monitor a response to the traffic by the DUT, and determine if the response by the DUT matches the predicted response.
    Type: Application
    Filed: April 18, 2017
    Publication date: October 18, 2018
    Applicant: Raytheon Company
    Inventors: Luke Wolff, Neel Shah
  • Publication number: 20180060453
    Abstract: Described embodiments provide systems and methods for verifying functionality of a circuit design under test (DUT). A verification method includes generating a transaction stream for a communication interface of the DUT. The transaction stream includes one or more transactions that are associated with commands of the communication interface and test data associated with the commands. The transaction stream is sent to the DUT via the communication interface. Responses sent from the DUT via the communication interface are monitored. The transactions and the responses are classified based upon one or more characteristics of the transactions and the responses. A graphical representation of the transactions and responses is generated based upon the classification.
    Type: Application
    Filed: August 24, 2016
    Publication date: March 1, 2018
    Applicant: Raytheon Company
    Inventor: Neel Shah
  • Publication number: 20160338734
    Abstract: The present disclosure relates to a needle including a wall structure, a cutting edge and a blunt contour. The needle advantageously can be used to deliver a sensor (such as a glucose or other analyte sensor) through an outer skin layer and into a sensor depth in a less invasive way than prior art needles. The size of the cutting edge is balanced against a portion of the distal wall structure that has blunt contours. Thus, the needle is capable of cutting the more durable outer skin layer (first phase) and then progressively stretching open the cut for further advancement into the subcutaneous layer (second phase). When the needle is sufficiently advanced, it is retracted leaving the sensor in a desired position. Early testing has shown a reduction of “dip and recover” from glucose sensors delivered using the needle.
    Type: Application
    Filed: May 20, 2016
    Publication date: November 24, 2016
    Inventors: Neel Shah, Jennifer Blackwell, Jonathan Hughes, Ted Tang Lee, Peter C. Simpson, Shanger Wang