Patents by Inventor NEER ROGGEL

NEER ROGGEL has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11860703
    Abstract: The technology disclosed herein determining one or more vulnerable instructions in workload code and determining one or more additional instructions to be inserted in the workload code based at least in part on a power model of a system bus of a processor, when a power model of a processor is dependent on an order of instructions of workload code, inserting the one or more additional instructions with dependency to the workload code to produce complementary power consumption of the system bus to power consumption of the system bus from executing the one or more vulnerable instructions; and when the power model is not dependent on the order of instructions of workload code, inserting the one or more additional instructions without dependency to the workload code to produce complementary power consumption of the system bus to power consumption of the system bus from executing the one or more vulnerable instructions.
    Type: Grant
    Filed: August 4, 2022
    Date of Patent: January 2, 2024
    Assignee: INTEL CORPORATION
    Inventors: Abhishek Chakraborty, Chen Liu, Jason Fung, Neer Roggel
  • Patent number: 11493975
    Abstract: In one embodiment, a processor comprises a plurality of cores and a controller. Each of the plurality of cores may include: an execution circuit, a power measurement circuit to measure power consumption of the core and a first register to store a power-related context identifier to identify a process to be executed on the core. The controller may include: a plurality of energy status registers each associated with a power-related context identifier and to store energy consumption information of a process; and a control circuit coupled to the plurality of energy status registers, where the control circuit is to enable each of a plurality of processes to independently monitor the energy consumption information of the process and prevent each of the plurality of processes from monitoring the energy consumption information of other ones of the plurality of processes. Other embodiments are described and claimed.
    Type: Grant
    Filed: September 24, 2020
    Date of Patent: November 8, 2022
    Assignee: Intel Corporation
    Inventors: Benjamin Gras, Neer Roggel
  • Publication number: 20220091651
    Abstract: In one embodiment, a processor comprises a plurality of cores and a controller. Each of the plurality of cores may include: an execution circuit, a power measurement circuit to measure power consumption of the core and a first register to store a power-related context identifier to identify a process to be executed on the core. The controller may include: a plurality of energy status registers each associated with a power-related context identifier and to store energy consumption information of a process; and a control circuit coupled to the plurality of energy status registers, where the control circuit is to enable each of a plurality of processes to independently monitor the energy consumption information of the process and prevent each of the plurality of processes from monitoring the energy consumption information of other ones of the plurality of processes. Other embodiments are described and claimed.
    Type: Application
    Filed: September 24, 2020
    Publication date: March 24, 2022
    Inventors: BENJAMIN GRAS, NEER ROGGEL