Patents by Inventor Neeraj Anil Pendse

Neeraj Anil Pendse has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7432575
    Abstract: A high performance and small-scale circuitry substrate is described. The circuitry substrate includes a dielectric layer, a return plane attached to a bottom surface of the dielectric layer, and a plurality of return paths (ground) and signal lines that are attached to a top surface of the dielectric layer. The return paths on the top surface are connected to the return plane on the bottom surface by wrapping around at least one edge of the dielectric material. Return paths on the top layer can also separate each pair or adjacent signal lines. The circuitry substrate can be advantageously used to form an optoelectronic module.
    Type: Grant
    Filed: June 8, 2004
    Date of Patent: October 7, 2008
    Assignee: National Semiconductor Corporation
    Inventors: Neeraj Anil Pendse, Jia Liu, Jitendra Mohan, Bruce Carlton Roberts, Luu Thanh Nguyen, William Paul Mazotti
  • Patent number: 7086786
    Abstract: A high performance ceramic block for use with small-scale circuitry is described. The block can be used in an optical sub-assembly (OSA) suitable for optical interconnection with optical fibers and electrical interconnection with a chip sub-assembly (CSA) is formed. The block includes a first surface and a second surface and is formed using one of low temperature co-fired ceramic (LTCC) and high temperature co-fired ceramic (HTCC) techniques. Photonic devices are formed on the first surface of the ceramic block and electrical contacts are formed on a second surface of the block. The electrical contacts being suitable for electrical communication with a chip sub-assembly. Electrical connections are formed so that they pass internally through the ceramic block to electrically interconnect the photonic devices on the first face of the block with the electrical contacts on the second face of the block. Such a block can be advantageously used to form an optoelectronic module.
    Type: Grant
    Filed: May 18, 2004
    Date of Patent: August 8, 2006
    Assignee: National Semiconductor Corporation
    Inventors: Neeraj Anil Pendse, Bruce Carlton Roberts, Jia Liu, Lionel Auzereau, Christopher Barratt
  • Publication number: 20040216918
    Abstract: A high performance and small-scale circuitry substrate is described. The circuitry substrate includes a dielectric layer, a return plane attached to a bottom surface of the dielectric layer, and a plurality of return paths (ground) and signal lines that are attached to a top surface of the dielectric layer. The return paths on the top surface are connected to the return plane on the bottom surface by wrapping around at least one edge of the dielectric material. Return paths on the top layer can also separate each pair or adjacent signal lines. The circuitry substrate can be advantageously used to form an optoelectronic module.
    Type: Application
    Filed: June 8, 2004
    Publication date: November 4, 2004
    Applicant: National Semiconductor Corporation, A Delaware Corp.
    Inventors: Neeraj Anil Pendse, Jia Liu, Jitendra Mohan, Bruce Carlton Roberts, Luu Thanh Nguyen, William Paul Mazotti
  • Publication number: 20040213525
    Abstract: A high performance ceramic block for use with small-scale circuitry is described. The block can be used in an optical sub-assembly (OSA) suitable for optical interconnection with optical fibers and electrical interconnection with a chip sub-assembly (CSA) is formed. The block includes a first surface and a second surface and is formed using one of low temperature co-fired ceramic (LTCC) and high temperature co-fired ceramic (HTCC) techniques. Photonic devices are formed on the first surface of the ceramic block and electrical contacts are formed on a second surface of the block. The electrical contacts being suitable for electrical communication with a chip sub-assembly. Electrical connections are formed so that they pass internally through the ceramic block to electrically interconnect the photonic devices on the first face of the block with the electrical contacts on the second face of the block. Such a block can be advantageously used to form an optoelectronic module.
    Type: Application
    Filed: May 18, 2004
    Publication date: October 28, 2004
    Applicant: National Semiconductor Corporation
    Inventors: Neeraj Anil Pendse, Bruce Carlton Roberts, Jia Liu, Lionel Auzereau, Christopher Barratt
  • Patent number: 6803648
    Abstract: Semiconductor device packages having top and bottom interconnecting surfaces that can be connected to external electrical systems are described. These packages include internal contact leads that are bent such that they extend from a top surface to a bottom surface of the package and thereby form the corresponding interconnecting surfaces. In some embodiments, a solder ball is formed on either the top or bottom portion of the contact leads so that the solder balls form one of the contact surfaces of the package.
    Type: Grant
    Filed: January 10, 2003
    Date of Patent: October 12, 2004
    Assignee: National Semiconductor Corporation
    Inventors: Nikhil Kelkar, Neeraj Anil Pendse
  • Patent number: 6767140
    Abstract: A high performance ceramic block for use with small-scale circuitry is described. The block can be used in an optical sub-assembly (OSA) suitable for optical interconnection with optical fibers and electrical interconnection with a chip sub-assembly (CSA) is formed. The block includes a first surface and a second surface and is formed using one of low temperature co-fired ceramic (LTCC) and high temperature co-fired ceramic (HTCC) techniques. Photonic devices are formed on the first surface of the ceramic block and electrical contacts are formed on a second surface of the block. The electrical contacts being suitable for electrical communication with a chip sub-assembly. Electrical connections are formed so that they pass internally through the ceramic block to electrically interconnect the photonic devices on the first face of the block with the electrical contacts on the second face of the block. Such a block can be advantageously used to form an optoelectronic module.
    Type: Grant
    Filed: March 3, 2003
    Date of Patent: July 27, 2004
    Assignee: National Semiconductor Corporation
    Inventors: Neeraj Anil Pendse, Bruce Carlton Roberts, Jia Liu, Lionel Auzereau, Christopher Barratt
  • Patent number: 6765275
    Abstract: A high performance and small-scale circuitry substrate is described. The circuitry substrate includes a dielectric layer, a return plane attached to a bottom surface of the dielectric layer, and a plurality of return paths (ground) and signal lines that are attached to a top surface of the dielectric layer. The return paths on the top surface are connected to the return plane on the bottom surface by wrapping around at least one edge of the dielectric material. Return paths on the top layer can also separate each pair or adjacent signal lines. The circuitry substrate can be advantageously used to form an optoelectronic module.
    Type: Grant
    Filed: November 6, 2002
    Date of Patent: July 20, 2004
    Assignee: National Semiconductor Corporation
    Inventors: Neeraj Anil Pendse, Jia Liu, Jitendra Mohan, Bruce Carlton Roberts, Luu Thanh Nguyen, William Paul Mazotti
  • Publication number: 20030165303
    Abstract: A high performance ceramic block for use with small-scale circuitry is described. The block can be used in an optical sub-assembly (OSA) suitable for optical interconnection with optical fibers and electrical interconnection with a chip sub-assembly (CSA) is formed. The block includes a first surface and a second surface and is formed using one of low temperature co-fired ceramic (LTCC) and high temperature co-fired ceramic (HTCC) techniques. Photonic devices are formed on the first surface of the ceramic block and electrical contacts are formed on a second surface of the block. The electrical contacts being suitable for electrical communication with a chip sub-assembly. Electrical connections are formed so that they pass internally through the ceramic block to electrically interconnect the photonic devices on the first face of the block with the electrical contacts on the second face of the block. Such a block can be advantageously used to form an optoelectronic module.
    Type: Application
    Filed: March 3, 2003
    Publication date: September 4, 2003
    Applicant: National Semiconductor Corporation, a Delaware Corporation
    Inventors: Neeraj Anil Pendse, Bruce Carlton Roberts, Jia Liu, Lionel Auzereau, Christopher Barratt