Patents by Inventor NEERAJ LADKANI
NEERAJ LADKANI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11921582Abstract: A computer system is configured to manage a value of a variable via firmware. Managing the value of the variable includes detecting a system management interrupt (SMI), causing the computer system to enter a system management mode, in which a request associated with the SMI is handled by the firmware. In response to determining that the SMI is generated by a baseboard management controller (BMC) and that a cause thereof is associated with reading or writing a value of a variable, one or more parameters associated with the variable are obtained from the BMC. Based on the cause of the request and the one or more parameters, the value of the variable is read or overwritten with a new value. The value or the new value is then sent to the BMC, which in turn passes the value or new value to a second computer system over a network.Type: GrantFiled: April 29, 2022Date of Patent: March 5, 2024Assignee: Microsoft Technology Licensing, LLCInventors: Neeraj Ladkani, Kuo-Shu Huang, James George Cavalaris
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Publication number: 20230350757Abstract: A computer system includes a baseboard management controller (BMC) configured to manage values of a plurality of variables stored in a flash via firmware. Managing the values of the plurality of variables includes generating a capsule containing a request for reading a value of a variable among the plurality of variables or overwriting the value of the variable with a new value. The capsule is then sent to the firmware, causing the firmware to access the flash to read the value of the variable or overwrite the value of the variable with the new value, and cause the value or the new value to be transmitted to the BMC. In response to receiving the value or new value of the variable, the BMC passes the value or the new value of the variable to a second computer system over an out-of-band network.Type: ApplicationFiled: April 29, 2022Publication date: November 2, 2023Inventors: Neeraj LADKANI, Kuo-Shu HUANG, James George CAVALARIS
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Publication number: 20230350756Abstract: A computer system is configured to manage a value of a variable via firmware. Managing the value of the variable includes detecting a system management interrupt (SMI), causing the computer system to enter a system management mode, in which a request associated with the SMI is handled by the firmware. In response to determining that the SMI is generated by a baseboard management controller (BMC) and that a cause thereof is associated with reading or writing a value of a variable, one or more parameters associated with the variable are obtained from the BMC. Based on the cause of the request and the one or more parameters, the value of the variable is read or overwritten with a new value. The value or the new value is then sent to the BMC, which in turn passes the value or new value to a second computer system over a network.Type: ApplicationFiled: April 29, 2022Publication date: November 2, 2023Inventors: Neeraj LADKANI, Kuo-Shu HUANG, James George CAVALARIS
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Patent number: 11789821Abstract: A computer system includes a baseboard management controller (BMC) configured to manage values of a plurality of variables stored in a flash via firmware. Managing the values of the plurality of variables includes generating a capsule containing a request for reading a value of a variable among the plurality of variables or overwriting the value of the variable with a new value. The capsule is then sent to the firmware, causing the firmware to access the flash to read the value of the variable or overwrite the value of the variable with the new value, and cause the value or the new value to be transmitted to the BMC. In response to receiving the value or new value of the variable, the BMC passes the value or the new value of the variable to a second computer system over an out-of-band network.Type: GrantFiled: April 29, 2022Date of Patent: October 17, 2023Assignee: Microsoft Technology Licensing, LLCInventors: Neeraj Ladkani, Kuo-Shu Huang, James George Cavalaris
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Publication number: 20230315490Abstract: Methods, systems, apparatuses, and computer-readable storage mediums described herein are configured to dynamically configure a baseboard management controller to monitor a state of a server. For example, a configuration schema may be provided to the baseboard management controller. The configuration schema specifies each of the devices of the server that is to be monitored by the baseboard management controller. The configuration schema also specifies additional configuration details with respect to each of the devices. Based on the configuration information included in the configuration schema, the baseboard management controller performs a discovery sequence with respect to each of the devices to verify that such devices are communicatively coupled to the baseboard management controller. If the discovery sequence is successful, the baseboard management controller begins monitoring the devices.Type: ApplicationFiled: June 5, 2023Publication date: October 5, 2023Inventors: Bryan D. KELLY, Neeraj LADKANI
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Patent number: 11714661Abstract: Methods, systems, apparatuses, and computer-readable storage mediums described herein are configured to dynamically configure a baseboard management controller to monitor a state of a server. For example, a configuration schema may be provided to the baseboard management controller. The configuration schema specifies each of the devices of the server that is to be monitored by the baseboard management controller. The configuration schema also specifies additional configuration details with respect to each of the devices. Based on the configuration information included in the configuration schema, the baseboard management controller performs a discovery sequence with respect to each of the devices to verify that such devices are communicatively coupled to the baseboard management controller. If the discovery sequence is successful, the baseboard management controller begins monitoring the devices.Type: GrantFiled: June 30, 2022Date of Patent: August 1, 2023Assignee: MICROSOFT TECHNOLOGY LICENSING, LLCInventors: Bryan D. Kelly, Neeraj Ladkani
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Publication number: 20230229423Abstract: A host computing device includes a host processor, host memory in electronic communication with the host processor, and an auxiliary service controller. The host computing device also includes a communication interface and a messaging interface between the host processor and the auxiliary service controller. A message handler is stored in the host memory. The message handler is executable by the host processor in response to detecting a messaging interface signal on the messaging interface. Execution of the message handler by the host processor causes a firmware update patch to be read from a shared memory region in the auxiliary service controller via the communication interface.Type: ApplicationFiled: March 24, 2023Publication date: July 20, 2023Inventors: Neeraj LADKANI, Daini XIE, Mallik BULUSU, Muhammad Ashfaq AHMED
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Publication number: 20230216607Abstract: The methods and systems provide remote device recovery using a sideband communication path in response to an error occurring in the device. A management entity sends a sideband communication using the sideband communication path to a logic circuit in communication with the device. The logic circuit initiates the recovery of the device.Type: ApplicationFiled: December 30, 2021Publication date: July 6, 2023Inventors: Neeraj LADKANI, Mark Andrew SHAW
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Patent number: 11640290Abstract: A host computing device includes a host processor, host memory in electronic communication with the host processor, and an auxiliary service controller. The host computing device also includes a communication interface and a messaging interface between the host processor and the auxiliary service controller. A message handler is stored in the host memory. The message handler is executable by the host processor in response to detecting a messaging interface signal on the messaging interface. Execution of the message handler by the host processor causes a firmware update patch to be read from a shared memory region in the auxiliary service controller via the communication interface.Type: GrantFiled: October 27, 2020Date of Patent: May 2, 2023Inventors: Neeraj Ladkani, Daini Xie, Mallik Bulusu, Muhammad Ashfaq Ahmed
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Patent number: 11544148Abstract: To preserve error context during a reboot of a computing device, firmware within the computing device can be configured to implement a method that includes determining where the error context is stored in volatile memory. The method can also include identifying a plurality of recorder regions in non-volatile memory that have been assigned to store the error context. The plurality of recorder regions can be disaggregated across a plurality of distinct non-volatile memory regions. The method can also include flushing the error context from a plurality of different volatile memory locations to the plurality of recorder regions in response to detecting a trigger. The flushing can occur prior to the reboot of the computing device. The method can also include restoring at least some of the error context to the volatile memory after the computing device has been rebooted.Type: GrantFiled: April 2, 2021Date of Patent: January 3, 2023Assignee: Microsoft Technology Licensing, LLCInventors: Mallik Bulusu, Muhammad Ashfaq Ahmed, Tom Long Nguyen, Neeraj Ladkani, Ravi Mysore Shantamurthy
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Patent number: 11520648Abstract: Implementing a firmware watchdog timer. A system presents a data structure over a bus which exposes, to software executing at a central processing unit (CPU), a hardware resource that is associated with a watchdog timer, attribute(s) of the watchdog timer, and (iii) commands available to the software executing at the CPU for managing the watchdog timer via one or more native CPU instructions that target the hardware resource. The system listens on the bus for a data value written to the hardware resource (i.e., by a native CPU operation issued by the software executing at the CPU), and identifies a particular command for managing the watchdog timer based on the data value written. Based on identifying the particular command, the system performs at least one of: initializing the watchdog timer, starting the watchdog timer, resetting the watchdog timer, or stopping the watchdog timer.Type: GrantFiled: September 25, 2020Date of Patent: December 6, 2022Assignee: Microsoft Technology Licensing, LLCInventors: Bruce John Sherwin, Jr., Neeraj Ladkani, Jason Stewart Wohlgemuth, James Anthony Schwartz, Jr.
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Publication number: 20220326965Abstract: Methods, systems, apparatuses, and computer-readable storage mediums described herein are configured to dynamically configure a baseboard management controller to monitor a state of a server. For example, a configuration schema may be provided to the baseboard management controller. The configuration schema specifies each of the devices of the server that is to be monitored by the baseboard management controller. The configuration schema also specifies additional configuration details with respect to each of the devices. Based on the configuration information included in the configuration schema, the baseboard management controller performs a discovery sequence with respect to each of the devices to verify that such devices are communicatively coupled to the baseboard management controller. If the discovery sequence is successful, the baseboard management controller begins monitoring the devices.Type: ApplicationFiled: June 30, 2022Publication date: October 13, 2022Inventors: Bryan D. KELLY, Neeraj LADKANI
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Publication number: 20220318093Abstract: To preserve error context during a reboot of a computing device, firmware within the computing device can be configured to implement a method that includes determining where the error context is stored in volatile memory. The method can also include identifying a plurality of recorder regions in non-volatile memory that have been assigned to store the error context. The plurality of recorder regions can be disaggregated across a plurality of distinct non-volatile memory regions. The method can also include flushing the error context from a plurality of different volatile memory locations to the plurality of recorder regions in response to detecting a trigger. The flushing can occur prior to the reboot of the computing device. The method can also include restoring at least some of the error context to the volatile memory after the computing device has been rebooted.Type: ApplicationFiled: April 2, 2021Publication date: October 6, 2022Inventors: Mallik BULUSU, Muhammad Ashfaq AHMED, Tom Long NGUYEN, Neeraj LADKANI, Ravi MYSORE SHANTAMURTHY
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Patent number: 11452244Abstract: The present concepts maintain forward flow and prevent reverse flow of heat-transferring media. A first zone and a second zone are proximate to each other. A first fan moves air through the first zone in a forward direction. A second fan moves air through the second zone in a forward direction. The speed of the first fan is compared with the speed of the second fan. If the first fan speed is slower than the second fan speed, then the first fan speed is adjusted to match the second fan speed. Therefore, reverse airflow in the first zone is prevented.Type: GrantFiled: December 30, 2019Date of Patent: September 20, 2022Assignee: Microsoft Technology Licensing, LLCInventors: Rameez Kazi, Neeraj Ladkani, Brandon Earl Gary
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Patent number: 11422876Abstract: A computer system includes a bus interface having error correction capability. The bus interface includes an error register that is configured to provide error information related to correctable errors. System software within the computer system is configured to obtain the error information from the error register and calculate a bit error metric based on the error information. A baseboard management controller within the computer system is configured to take an action in response to obtaining the bit error metric from the system software and determining that a condition related to the bit error metric has been satisfied.Type: GrantFiled: August 2, 2019Date of Patent: August 23, 2022Assignee: MICROSOFT TECHNOLOGY LICENSING, LLCInventors: Jeffrey Matthew Shuey, Neeraj Ladkani, Tao Liu, Subhasish Chakraborty
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Patent number: 11409544Abstract: Methods, systems, apparatuses, and computer-readable storage mediums described herein are configured to dynamically configure a baseboard management controller to monitor a state of a server. For example, a configuration schema may be provided to the baseboard management controller. The configuration schema specifies each of the devices of the server that is to be monitored by the baseboard management controller. The configuration schema also specifies additional configuration details with respect to each of the devices. Based on the configuration information included in the configuration schema, the baseboard management controller performs a discovery sequence with respect to each of the devices to verify that such devices are communicatively coupled to the baseboard management controller. If the discovery sequence is successful, the baseboard management controller begins monitoring the devices.Type: GrantFiled: May 7, 2019Date of Patent: August 9, 2022Assignee: MICROSOFT TECHNOLOGY LICENSING, LLCInventors: Bryan D. Kelly, Neeraj Ladkani
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Patent number: 11397457Abstract: One aspect of the present disclosure involves dynamically performing power capping with respect to a group of computing systems. Different priority levels can be assigned to at least some of the individual computing systems within the group of computing systems. Individual power limits can be set for the plurality of individual computing systems based at least in part on the different priority levels and utilization levels of the plurality of individual computing systems. Another aspect of the present disclosure involves dynamically performing power capping with respect to various subsystems of a computing system. Different priority levels can be assigned to at least some of the plurality of individual subsystems within the computing system. Individual power limits can be set for the plurality of individual subsystems based at least in part on the different priority levels and current power consumption of the plurality of individual subsystems.Type: GrantFiled: June 26, 2020Date of Patent: July 26, 2022Assignee: MICROSOFT TECHNOLOGY LICENSING, LLCInventors: Vishal Jain, Teague Curtiss Mapes, Neeraj Ladkani, Sunny Gautam
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Patent number: 11379212Abstract: While booting a host computing device on a cloud computing system, system firmware (such as Basic Input/Output System (BIOS) or Unified Extensible Firmware Interface (UEFI)) sends a query to a management subsystem (such as a baseboard management controller (BMC)) for updated configuration data used during a boot of the host computing device. The management subsystem sends the updated configuration data to the system firmware, and boot instructions in the system firmware compare the updated configuration data with configuration data stored on the host computing device. If the respective configuration data match, the boot instructions continue with booting the host computing device. If the configuration data do not match, then the boot instructions update the stored configuration data with the updated configuration data and then proceed to boot the host computing device.Type: GrantFiled: August 31, 2020Date of Patent: July 5, 2022Assignee: MICROSOFT TECHNOLOGY LICENSING, LLCInventors: Ravi Mysore Shantamurthy, Muhammad Ashfaq Ahmed, Mallik Bulusu, Neeraj Ladkani, Sagar Dharia
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Publication number: 20220129258Abstract: A host computing device includes a host processor, host memory in electronic communication with the host processor, and an auxiliary service controller. The host computing device also includes a communication interface and a messaging interface between the host processor and the auxiliary service controller. A message handler is stored in the host memory. The message handler is executable by the host processor in response to detecting a messaging interface signal on the messaging interface. Execution of the message handler by the host processor causes a firmware update patch to be read from a shared memory region in the auxiliary service controller via the communication interface.Type: ApplicationFiled: October 27, 2020Publication date: April 28, 2022Inventors: Neeraj LADKANI, Daini XIE, Mallik BULUSU, Muhammad Ashfaq AHMED
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Publication number: 20220100596Abstract: Implementing a firmware watchdog timer. A system presents a data structure over a bus which exposes, to software executing at a central processing unit (CPU), a hardware resource that is associated with a watchdog timer, attribute(s) of the watchdog timer, and (iii) commands available to the software executing at the CPU for managing the watchdog timer via one or more native CPU instructions that target the hardware resource. The system listens on the bus for a data value written to the hardware resource (i.e., by a native CPU operation issued by the software executing at the CPU), and identifies a particular command for managing the watchdog timer based on the data value written. Based on identifying the particular command, the system performs at least one of: initializing the watchdog timer, starting the watchdog timer, resetting the watchdog timer, or stopping the watchdog timer.Type: ApplicationFiled: September 25, 2020Publication date: March 31, 2022Inventors: Bruce John SHERWIN, JR., Neeraj LADKANI, Jason Stewart WOHLGEMUTH, James Anthony SCHWARTZ, JR.