Patents by Inventor Neeti Vohra

Neeti Vohra has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8045785
    Abstract: A fine pattern, such as a semiconductor integrated circuit (LSI), a liquid crystal panel, and a photomask (reticle) for the semiconductor or the liquid crystal panel, which are fabricated based on data for fabricating the fine pattern such as design data is inspected by a pattern inspection apparatus. The pattern inspection apparatus for inspecting a pattern to-be-inspected uses an image of the pattern to-be-inspected and data for fabricating the pattern to-be-inspected. The pattern inspection apparatus includes a reference pattern generation device configured to generate a reference pattern represented by one or more lines from the data, an image generation device configured to generate the image of the pattern to-be-inspected, a detecting device configured to detect an edge of the image of the pattern to-be-inspected, and an inspection device configured to inspect the pattern to-be-inspected by comparing edges of the image of the pattern to-be-inspected with the one or more lines of the reference pattern.
    Type: Grant
    Filed: August 6, 2010
    Date of Patent: October 25, 2011
    Assignee: NGR Inc.
    Inventors: Tadashi Kitamura, Kazufumi Kubota, Shinichi Nakazawa, Neeti Vohra, Masahiro Yamamoto, Toshiaki Hasebe
  • Publication number: 20100303334
    Abstract: A fine pattern, such as a semiconductor integrated circuit (LSI), a liquid crystal panel, and a photomask (reticle) for the semiconductor or the liquid crystal panel, which are fabricated based on data for fabricating the fine pattern such as design data is inspected by a pattern inspection apparatus. The pattern inspection apparatus for inspecting a pattern to-be-inspected uses an image of the pattern to-be-inspected and data for fabricating the pattern to-be-inspected. The pattern inspection apparatus includes a reference pattern generation device configured to generate a reference pattern represented by one or more lines from the data, an image generation device configured to generate the image of the pattern to-be-inspected, a detecting device configured to detect an edge of the image of the pattern to-be-inspected, and an inspection device configured to inspect the pattern to-be-inspected by comparing edges of the image of the pattern to-be-inspected with the one or more lines of the reference pattern.
    Type: Application
    Filed: August 6, 2010
    Publication date: December 2, 2010
    Inventors: Tadashi KITAMURA, Kazufumi KUBOTA, Shinichi NAKAZAWA, Neeti VOHRA, Masahiro YAMAMOTO, Toshiaki HASEBE
  • Patent number: 7817844
    Abstract: A pattern inspection apparatus is used for inspecting a pattern, such as semiconductor integrated circuit (LSI), liquid crystal panel, and a photomask by using an image of the pattern to-be-inspected and design data for fabricating the pattern to-be-inspected. The pattern inspection apparatus includes a reference pattern generation device for generating a reference pattern represented by one or more lines from design data, an image generation device for generating the image of the pattern to-be-inspected, a detecting device for detecting an edge of the image of the pattern to-be-inspected, and an inspection device for inspecting the pattern to-be-inspected by comparing the edge of the image of the pattern to-be-inspected with the one or more lines of the reference pattern.
    Type: Grant
    Filed: February 16, 2005
    Date of Patent: October 19, 2010
    Assignee: NanoGeometry Research Inc.
    Inventors: Tadashi Kitamura, Kazufumi Kubota, Shinichi Nakazawa, Neeti Vohra, Masahiro Yamamoto
  • Patent number: 7796801
    Abstract: A fine pattern, such as a semiconductor integrated circuit (LSI), a liquid crystal panel, and a photomask (reticle) for the semiconductor or the liquid crystal panel, which are fabricated based on data for fabricating the fine pattern such as design data is inspected by a pattern inspection apparatus. The pattern inspection apparatus for inspecting a pattern to-be-inspected uses an image of the pattern to-be-inspected and data for fabricating the pattern to-be-inspected.
    Type: Grant
    Filed: May 17, 2006
    Date of Patent: September 14, 2010
    Assignee: NanoGeometry Research Inc.
    Inventors: Tadashi Kitamura, Kazufumi Kubota, Shinichi Nakazawa, Neeti Vohra, Masahiro Yamamoto, Toshiaki Hasebe
  • Publication number: 20060245636
    Abstract: A fine pattern, such as a semiconductor integrated circuit (LSI), a liquid crystal panel, and a photomask (reticle) for the semiconductor or the liquid crystal panel, which are fabricated based on data for fabricating the fine pattern such as design data is inspected by a pattern inspection apparatus. The pattern inspection apparatus for inspecting a pattern to-be-inspected uses an image of the pattern to-be-inspected and data for fabricating the pattern to-be-inspected.
    Type: Application
    Filed: May 17, 2006
    Publication date: November 2, 2006
    Inventors: Tadashi Kitamura, Kazufumi Kubota, Shinichi Nakazawa, Neeti Vohra, Masahiro Yamamoto, Toshiaki Hasebe
  • Publication number: 20050146714
    Abstract: A pattern inspection apparatus is used for inspecting a pattern, such as semiconductor integrated circuit (LSI), liquid crystal panel, and a photomask by using an image of the pattern to-be-inspected and design data for fabricating the pattern to-be-inspected. The pattern inspection apparatus includes a reference pattern generation device for generating a reference pattern represented by one or more lines from design data, an image generation device for generating the image of the pattern to-be-inspected, a detecting device for detecting an edge of the image of the pattern to-be-inspected, and an inspection device for inspecting the pattern to-be-inspected by comparing the edge of the image of the pattern to-be-inspected with the one or more lines of the reference pattern.
    Type: Application
    Filed: February 16, 2005
    Publication date: July 7, 2005
    Inventors: Tadashi Kitamura, Kazufumi Kubota, Shinichi Nakazawa, Neeti Vohra, Masahiro Yamamoto