Abstract: Some implementations provide systems methods and devices for integrated circuit self-test. The integrated circuit includes interface circuitry configured to read test data and to write the test data into memory of the integrated circuit. The integrated circuit also includes test circuitry configured to test the interface circuitry based on the test data written into memory of the integrated circuit. Some implementations provide an integrated circuit configured for storing and reading data. The integrated circuit includes circuitry configured to write or read a first portion of data to or from a first memory via BIST circuitry of the first memory until a first BIST counter saturates. The integrated circuit also includes circuitry configured to write or read a second portion of the data to or from a second memory via BIST circuitry of the second memory until a second BIST counter saturates.

Abstract: A computer-implemented method for enabling debugging can include receiving, at a peripheral device connected through an expansion socket to a base CPU platform, a scan dump instruction from a network computing device connected to the base CPU platform across a network connection and executing, by a System-on-Chip at the peripheral device in response to the scan dump instruction, a debugging procedure. The debugging procedure can include capturing a snapshot of memory of the peripheral device and transmitting the snapshot to the network computing device through memory addresses that have been assigned to memory-mapped input/output. Various other methods, systems, and computer-readable media are also disclosed.

Abstract: A disclosed technique includes clock gating a plurality of data elements of a first clock domain of a scan dump network; outputting data from a plurality of data elements of a second clock domain of the scan dump network; clock gating the plurality of data elements of the second clock domain; and outputting data from the plurality of data elements of the first clock domain.

Abstract: In some embodiments, the present disclosure provides an exemplary method that may include steps of identifying a plurality of entities seeking to interact with each other; determining a set of artifacts associated with each entity of the plurality of entities; Utilizing a cloud-based functionality to dynamically connect at least two entities based on a determination of the set of artifacts shared between the at least two entities; dynamically integrating a plurality of protocols into an interaction session associated with the at least two entities; verifying the plurality of protocols associated with the interaction session; initiating the interaction session between at least two entities based on the plurality of protocols and the set of artifacts; and automatically modifying the interaction session to orchestrate a transfer of at least one artifact of the set of artifacts between the at least two entities.

Abstract: Described herein are techniques to ensure a user using an external device is authorized to connect and connecting to a correct implantable medical device using a wireless communication protocol. A request for authorization is sent to the external device from the implantable medical device, and the authorization can be provided by an authorization pulse sent using the implantable medical device charger over the inductive link between the charging device and the implanted device. The authorization pulse can be trusted because the inductive link is short range, ensuring the patient is aware of the connection to the implanted device. Once the implanted device receives the authorization pulse, it may finalize the pairing over the first connection.

Abstract: A disclosed technique includes clock gating a plurality of data elements of a first clock domain of a scan dump network; outputting data from a plurality of data elements of a second clock domain of the scan dump network; clock gating the plurality of data elements of the second clock domain; and outputting data from the plurality of data elements of the first clock domain.

Abstract: Various embodiments and methods for improved joint repair are disclosed. At least some of the embodiments may include an adjustable loop construct with at least one anchor. At least some of the embodiments may include an all-suture anchor. At least some of the embodiments may include an adjustable loop construct with a locking passage. Embodiments may implement a method that reduces or avoids material removal from the bones of the joint. Embodiments may include means to reduce elongation of the repair over time.

Abstract: Described herein are techniques to ensure a user using an external device is authorized to connect and connecting to a correct implantable medical device using a wireless communication protocol. A request for authorization is sent to the external device from the implantable medical device, and the authorization can be provided by an authorization pulse sent using the implantable medical device charger over the inductive link between the charging device and the implanted device. The authorization pulse can be trusted because the inductive link is short range, ensuring the patient is aware of the connection to the implanted device. Once the implanted device receives the authorization pulse, it may finalize the pairing over the first connection.

Abstract: The present invention is directed to a novel process for purifying a recombinant polypeptide from a solution comprising one or more impurities, wherein the process is a chromatography process which uses saccharin. The present invention also provides the use of saccharin in a process for purifying a recombinant polypeptide from a solution comprising one or more impurities, wherein the process is a chromatography process. The invention further provides a wash buffer for purifying using chromatography a recombinant polypeptide from a solution comprising one or more impurities, wherein the wash buffer comprises saccharin.

Abstract: Described herein are techniques to ensure a user using an external device is authorized to connect and connecting to a correct implantable medical device using a wireless communication protocol. A request for authorization is sent to the external device from the implantable medical device, and the authorization can be provided by an authorization pulse sent using the implantable medical device charger over the inductive link between the charging device and the implanted device. The authorization pulse can be trusted because the inductive link is short range, ensuring the patient is aware of the connection to the implanted device. Once the implanted device receives the authorization pulse, it may finalize the pairing over the first connection.

Abstract: A knotless interference or contact fixation anchor assembly comprising an anchor body with a removable inserter/driver that fully supports the suture anchor over its entire working length. The anchor body may also incorporating a suture trap that is housed within a proximal eyelet of the anchor body. The anchor body may include a plurality of elongate ribs extending longitudinally along at least a portion of the anchor body. The plurality of ribs comprise flexible barbs. When inserted into bone or a bone tunnel, the barbs compress slightly, resulting in less bone compression around the anchor due to the forces required for insertion, and increased pull-out resistance.

Abstract: A system, method, and tangible computer readable medium for chip debug is disclosed. For example, the system can include a plurality of functional blocks, a debug path, and a debug bus steering module. The debug path couples the plurality of functional blocks in a daisy chain configuration, where an end functional block from the plurality of functional blocks is at an end of the daisy chain configuration. The debug bus steering module is configured to pass one or more debug signals associated with a first functional block from the plurality of functional blocks along the debug path to the end functional block while a second functional block from the plurality of functional blocks performs one or more power gating cycles.

Abstract: A system, method, and tangible computer readable medium for chip debug is disclosed. For example, the system can include a plurality of functional blocks, a debug path, and a debug bus steering module. The debug path couples the plurality of functional blocks in a daisy chain configuration, where an end functional block from the plurality of functional blocks is at an end of the daisy chain configuration. The debug bus steering module is configured to pass one or more debug signals associated with a first functional block from the plurality of functional blocks along the debug path to the end functional block while a second functional block from the plurality of functional blocks performs one or more power gating cycles.

Abstract: A value is obtained from one or more values from one or more nested procedures, for a variable that is undefined within one procedure that is nested in one or more nested procedures.