Abstract: Some implementations provide systems methods and devices for integrated circuit self-test. The integrated circuit includes interface circuitry configured to read test data and to write the test data into memory of the integrated circuit. The integrated circuit also includes test circuitry configured to test the interface circuitry based on the test data written into memory of the integrated circuit. Some implementations provide an integrated circuit configured for storing and reading data. The integrated circuit includes circuitry configured to write or read a first portion of data to or from a first memory via BIST circuitry of the first memory until a first BIST counter saturates. The integrated circuit also includes circuitry configured to write or read a second portion of the data to or from a second memory via BIST circuitry of the second memory until a second BIST counter saturates.

Abstract: Various embodiments and methods for improved joint repair are disclosed. At least some of the embodiments may include an adjustable loop construct with at least one anchor. At least some of the embodiments may include an all-suture anchor. At least some of the embodiments may include an adjustable loop construct with a locking passage. Embodiments may implement a method that reduces or avoids material removal from the bones of the joint. Embodiments may include means to reduce elongation of the repair over time.

Abstract: The disclosed device includes an input, an output and multiple flops serially connected between the input and the output. The device also includes a bypass circuit coupled to the input and the output and a control circuit. The control circuit can enable, in response to a first trigger, the flops to shift data to the output. In response to a second trigger, the control circuit can disable the flops and enable the bypass circuit to shift data from the input to the output. The flops can be part of a chain of flops. Various other methods, systems, and computer-readable media are also disclosed.

Abstract: Scan chain data of a system-on-chip (SoC) is protected from unauthorized access by an encryption circuit disposed on the SoC. A test access port (TAP) is coupled to the scan chain and is configured to shift data through the scan chain. The encryption circuit is coupled to the TAP and is configured to encrypt the data into encrypted data for output from the SoC.

Abstract: A disclosed technique includes based on a clock pattern, determining an enable configuration for setting enable signals for one or more multi-cycle paths of a hardware logic network; controlling a selector to set the enable configuration for the one or more multi-cycle paths; and executing testing operations for the hardware logic network with the one or more multi-cycle paths enabled according to the enable configuration.

Abstract: An exemplary apparatus for interfacing dies that use incompatible protocols includes a first die that uses a first protocol, a second die that uses a second protocol, and a die management unit communicatively coupled to both the first die and the second die in an integrated circuit. In some examples, the die management unit is configured to translate at least one message between the first protocol and the second protocol to support communication between the first die and the second die. Various other apparatuses, systems, and methods are also disclosed.

Abstract: The disclosed device includes an input, an output and multiple flops serially connected between the input and the output. The device also includes a bypass circuit coupled to the input and the output and a control circuit. The control circuit can enable, in response to a first trigger, the flops to shift data to the output. In response to a second trigger, the control circuit can disable the flops and enable the bypass circuit to shift data from the input to the output. The flops can be part of a chain of flops. Various other methods, systems, and computer-readable media are also disclosed.

Abstract: A tissue repair assembly is disclosed, including a soft anchor body and at least a first suture operably coupled to the anchor body. Tensioning on first and/or second ends of first suture may deploy the anchor body to a second configuration, in which the anchor body is axially compressed and radially extended. The tissue repair assembly may also include a means to cinch around a portion of a first and/or second suture and knotlessly lock the tissue repair assembly. Some embodiments may include a pre-formed knot. In some embodiments, the preformed knot may be a nail knot, provided wrapped around an insertion instrument and configured to receive and cinch around a suture extending therethrough.

Abstract: A disclosed technique includes based on a clock pattern, determining an enable configuration for setting enable signals for one or more multi-cycle paths of a hardware logic network; controlling a selector to set the enable configuration for the one or more multi-cycle paths; and executing testing operations for the hardware logic network with the one or more multi-cycle paths enabled according to the enable configuration.

Abstract: Some implementations provide systems methods and devices for integrated circuit self-test. The integrated circuit includes interface circuitry configured to read test data and to write the test data into memory of the integrated circuit. The integrated circuit also includes test circuitry configured to test the interface circuitry based on the test data written into memory of the integrated circuit. Some implementations provide an integrated circuit configured for storing and reading data. The integrated circuit includes circuitry configured to write or read a first portion of data to or from a first memory via BIST circuitry of the first memory until a first BIST counter saturates. The integrated circuit also includes circuitry configured to write or read a second portion of the data to or from a second memory via BIST circuitry of the second memory until a second BIST counter saturates.

Abstract: A computer-implemented method for enabling debugging can include receiving, at a peripheral device connected through an expansion socket to a base CPU platform, a scan dump instruction from a network computing device connected to the base CPU platform across a network connection and executing, by a System-on-Chip at the peripheral device in response to the scan dump instruction, a debugging procedure. The debugging procedure can include capturing a snapshot of memory of the peripheral device and transmitting the snapshot to the network computing device through memory addresses that have been assigned to memory-mapped input/output. Various other methods, systems, and computer-readable media are also disclosed.

Abstract: A disclosed technique includes clock gating a plurality of data elements of a first clock domain of a scan dump network; outputting data from a plurality of data elements of a second clock domain of the scan dump network; clock gating the plurality of data elements of the second clock domain; and outputting data from the plurality of data elements of the first clock domain.

Abstract: In some embodiments, the present disclosure provides an exemplary method that may include steps of identifying a plurality of entities seeking to interact with each other; determining a set of artifacts associated with each entity of the plurality of entities; Utilizing a cloud-based functionality to dynamically connect at least two entities based on a determination of the set of artifacts shared between the at least two entities; dynamically integrating a plurality of protocols into an interaction session associated with the at least two entities; verifying the plurality of protocols associated with the interaction session; initiating the interaction session between at least two entities based on the plurality of protocols and the set of artifacts; and automatically modifying the interaction session to orchestrate a transfer of at least one artifact of the set of artifacts between the at least two entities.

Abstract: Described herein are techniques to ensure a user using an external device is authorized to connect and connecting to a correct implantable medical device using a wireless communication protocol. A request for authorization is sent to the external device from the implantable medical device, and the authorization can be provided by an authorization pulse sent using the implantable medical device charger over the inductive link between the charging device and the implanted device. The authorization pulse can be trusted because the inductive link is short range, ensuring the patient is aware of the connection to the implanted device. Once the implanted device receives the authorization pulse, it may finalize the pairing over the first connection.

Abstract: A disclosed technique includes clock gating a plurality of data elements of a first clock domain of a scan dump network; outputting data from a plurality of data elements of a second clock domain of the scan dump network; clock gating the plurality of data elements of the second clock domain; and outputting data from the plurality of data elements of the first clock domain.

Abstract: Various embodiments and methods for improved joint repair are disclosed. At least some of the embodiments may include an adjustable loop construct with at least one anchor. At least some of the embodiments may include an all-suture anchor. At least some of the embodiments may include an adjustable loop construct with a locking passage. Embodiments may implement a method that reduces or avoids material removal from the bones of the joint. Embodiments may include means to reduce elongation of the repair over time.

Abstract: Described herein are techniques to ensure a user using an external device is authorized to connect and connecting to a correct implantable medical device using a wireless communication protocol. A request for authorization is sent to the external device from the implantable medical device, and the authorization can be provided by an authorization pulse sent using the implantable medical device charger over the inductive link between the charging device and the implanted device. The authorization pulse can be trusted because the inductive link is short range, ensuring the patient is aware of the connection to the implanted device. Once the implanted device receives the authorization pulse, it may finalize the pairing over the first connection.

Abstract: The present invention is directed to a novel process for purifying a recombinant polypeptide from a solution comprising one or more impurities, wherein the process is a chromatography process which uses saccharin. The present invention also provides the use of saccharin in a process for purifying a recombinant polypeptide from a solution comprising one or more impurities, wherein the process is a chromatography process. The invention further provides a wash buffer for purifying using chromatography a recombinant polypeptide from a solution comprising one or more impurities, wherein the wash buffer comprises saccharin.

Abstract: Described herein are techniques to ensure a user using an external device is authorized to connect and connecting to a correct implantable medical device using a wireless communication protocol. A request for authorization is sent to the external device from the implantable medical device, and the authorization can be provided by an authorization pulse sent using the implantable medical device charger over the inductive link between the charging device and the implanted device. The authorization pulse can be trusted because the inductive link is short range, ensuring the patient is aware of the connection to the implanted device. Once the implanted device receives the authorization pulse, it may finalize the pairing over the first connection.