Patents by Inventor Neil A. Davies
Neil A. Davies has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 12199026Abstract: An interposer subassembly that is suitable for an electronic system having at least one integrated circuit (1C) component. The interposer subassembly includes a flexible base layer, having a first surface and an opposing second surface, at least one active electronic circuit component, operatively integrated within the flexible base layer, and at least one first patterned contact layer, provided on any one of the first surface and the second surface of the flexible base layer and which is configured to operably interface with the at least one active electronic circuit component and the at least one 1C component.Type: GrantFiled: January 31, 2020Date of Patent: January 14, 2025Assignee: PRAGMATIC SEMICONDUCTOR LIMITEDInventors: Brian Cobb, Scott White, Ken Williamson, Anthony Sou, Catherine Ramsdale, Rob Mann, Neil Davies, Joao de Oliveira, Gillian Ewers, Pascaline Boulanger, Richard Price
-
Publication number: 20240322033Abstract: A vertical power transistor having front and rear sides. The vertical power transistor includes a drift region that includes a first doping with a first charge carrier type, and a body region that includes a second doping with a second charge carrier type. The body region is situated on the drift region, and includes trenches that extend, starting from the front side, essentially perpendicularly into the drift region. First and second areas are situated between the trenches. The first areas are situated centrally between the trenches, and the second areas are situated between the first areas and the trenches. The first and second areas, starting from the body region, extend essentially perpendicularly into the drift region. The first areas include a third doping with the second charge carrier type, and the second areas include the first doping with the first charge carrier type.Type: ApplicationFiled: December 2, 2021Publication date: September 26, 2024Inventors: Dragos Costachescu, Neil Davies
-
Publication number: 20240234185Abstract: The invention relates to a system for manufacturing a plurality of integrated circuits, IC, mounted on a common support, the system comprising: an input station configured (adapted, arranged) to receive at least one common support; an output station configured (adapted, arranged) to receive at least one common support having a plurality of integrated circuits formed thereon; a plurality of processing modules each module being operable (configured, arranged, adapted) to perform at least one of the processing steps (e.g. deposition, patterning, etching) for forming an integrated circuit on the common support; a transfer means operable (configured, arranged, adapted) to transfer the at least one common support from the input station to the output station and to one or more of the processing modules therebetween; control means (e.g.Type: ApplicationFiled: December 29, 2023Publication date: July 11, 2024Inventors: Richard David PRICE, Neil DAVIES, Scott WHITE, Thomas Stanley VAN DEN HEEVER, Kenneth David WILLIAMSON, Nathaniel James GREEN
-
Patent number: 11990484Abstract: The present invention provides processes for manufacturing a plurality of discrete integrated circuits (ICs) on a carrier, the process comprising the steps of: providing a carrier for a flexible substrate; depositing a flexible substrate of uniform thickness on said carrier; removing at least a portion of the thickness of the flexible substrate from at least a portion of the IC connecting areas to form channels in the flexible substrate and a plurality of IC substrate units spaced apart from one another on the carrier by said channels; forming an integrated circuit on at least one of the IC substrate units.Type: GrantFiled: July 27, 2022Date of Patent: May 21, 2024Assignee: PRAGMATIC PRINTING LTD.Inventors: Richard Price, Brian Cobb, Neil Davies
-
Publication number: 20240136211Abstract: The invention relates to a system for manufacturing a plurality of integrated circuits, IC, mounted on a common support, the system comprising: an input station configured (adapted, arranged) to receive at least one common support; an output station configured (adapted, arranged) to receive at least one common support having a plurality of integrated circuits formed thereon; a plurality of processing modules each module being operable (configured, arranged, adapted) to perform at least one of the processing steps (e.g. deposition, patterning, etching) for forming an integrated circuit on the common support; a transfer means operable (configured, arranged, adapted) to transfer the at least one common support from the input station to the output station and to one or more of the processing modules therebetween; control means (e.g.Type: ApplicationFiled: December 29, 2023Publication date: April 25, 2024Inventors: Richard David PRICE, Neil DAVIES, Scott WHITE, Thomas Stanley VAN DEN HEEVER, Kenneth David WILLIAMSON, Nathaniel James GREEN
-
Publication number: 20240088251Abstract: A transistor is disclosed, comprising: a layer of semiconductor material comprising a first portion, a second portion, and a third portion connecting the first portion to the second portion and providing a semiconductive channel between the first portion and the second portion; a conductive first terminal covering and in electrical contact with said first portion of the layer of semiconductor material; a conductive second terminal covering and in electrical contact with said second portion of the layer of semiconductor material; a conductive gate terminal comprising a first overlapping portion covering at least part of the first terminal, and a channel portion covering the third portion of the layer of semiconductor material; and a layer of a first dielectric material, having a first dielectric constant, arranged between the first overlapping portion and the first terminal, and between the channel portion of the gate terminal and the third portion of the layer of semiconductor material.Type: ApplicationFiled: November 21, 2023Publication date: March 14, 2024Inventors: Richard PRICE, Nathaniel GREEN, Neil DAVIES, Adrian THORNDYKE, Feras ALKHALIL
-
Patent number: 11910533Abstract: The invention relates to a thermode for connecting at least two components, comprising a tip having a body portion with at least two contact surface portions connected to and spaced apart from one another by a recess configured to receive a portion of one of the at least two components; and a support portion having at least one supporting surface portion configured to support a further component (being the other of the at least two components, wherein the contact surface portions and the supporting surface portion are configured to receive the at least two components between them and wherein one or both of the contact surface portions and the supporting surface portion are moveable relative to and towards one another to exert heat and/or pressure on the at least two components located between the contact surface portions and the supporting portion.Type: GrantFiled: July 30, 2019Date of Patent: February 20, 2024Assignee: PRAGMATIC PRINTING LTD.Inventors: Neil Davies, Stephen Devenport, Richard Price
-
Publication number: 20240021610Abstract: A cascade arrangement and to a semiconductor module. The cascode arrangement includes: a substrate, a JFET, a MOSFET, and at least one sensor system. A drain terminal of the MOSFET is electrically connected to a source terminal of the JFET and a source terminal of the MOSFET is electrically connected to a gate terminal of the JFET. A first semiconductor layer in which the MOSFET is formed and a second semiconductor layer in which the JFET is formed, are situated stacked on top of one another via a connecting material. Both an electrical and a thermal coupling between the JFET and the MOSFET are implemented via the connecting material. The stacked semiconductor layers are situated on the substrate. The first semiconductor layer includes a first subarea in which the MOSFET is formed and at least one second subarea in which the at least one sensor system is formed.Type: ApplicationFiled: June 5, 2023Publication date: January 18, 2024Inventors: Josef Goeppert, Karl Oberdieck, Manuel Riefer, Neil Davies, Alexander Sewergin, Philipp Mueller
-
Publication number: 20230422404Abstract: An electronic circuit assembly comprises: a first electronic circuit module; a second electronic circuit module; and a quantity of anisotropic conductive adhesive, ACA, comprising a plurality of electrically conductive particles and an electrically non-conductive adhesive, arranged to bond the first electronic circuit module to the second electronic circuit module.Type: ApplicationFiled: November 24, 2021Publication date: December 28, 2023Inventors: Richard PRICE, Brian COBB, Laurence SCULLION, Melanie WINTER, Neil DAVIES
-
Publication number: 20220359579Abstract: The present invention provides processes for manufacturing a plurality of discrete integrated circuits (ICs) on a carrier, the process comprising the steps of: providing a carrier for a flexible substrate; depositing a flexible substrate of uniform thickness on said carrier; removing at least a portion of the thickness of the flexible substrate from at least a portion of the IC connecting areas to form channels in the flexible substrate and a plurality of IC substrate units spaced apart from one another on the carrier by said channels; forming an integrated circuit on at least one of the IC substrate units.Type: ApplicationFiled: July 27, 2022Publication date: November 10, 2022Inventors: Richard PRICE, Brian COBB, Neil DAVIES
-
Patent number: 11462575Abstract: The present invention provides processes for manufacturing a plurality of discrete integrated circuits (ICs) on a carrier, the process comprising the steps of: providing a carrier for a flexible substrate; depositing a flexible substrate of uniform thickness on said carrier; removing at least a portion of the thickness of the flexible substrate from at least a portion of the IC connecting areas to form channels in the flexible substrate and a plurality of IC substrate units spaced apart from one another on the carrier by said channels; forming an integrated circuit on at least one of the IC substrate units.Type: GrantFiled: January 30, 2019Date of Patent: October 4, 2022Assignee: PRAGMATIC PRINTING LTD.Inventors: Richard Price, Brian Cobb, Neil Davies
-
Publication number: 20220173219Abstract: A transistor is disclosed, comprising: a layer of semiconductor material comprising a first portion, a second portion, and a third portion connecting the first portion to the second portion and providing a semiconductive channel between the first portion and the second portion; a conductive first terminal covering and in electrical contact with said first portion of the layer of semiconductor material; a conductive second terminal covering and in electrical contact with said second portion of the layer of semiconductor material; a conductive gate terminal comprising a first overlapping portion covering at least part of the first terminal, and a channel portion covering the third portion of the layer of semiconductor material; and a layer of a first dielectric material, having a first dielectric constant, arranged between the first overlapping portion and the first terminal, and between the channel portion of the gate terminal and the third portion of the layer of semiconductor material.Type: ApplicationFiled: February 17, 2022Publication date: June 2, 2022Inventors: Richard PRICE, Nathaniel GREEN, Neil DAVIES, Adrian THORNDYKE, Feras ALKHALIL
-
Publication number: 20220130738Abstract: The present invention provides for an interposer subassembly that is suitable for an electronic system having at least one integrated circuit (1C) component. The interposer subassembly comprises a flexible base layer, having a first surface and an opposing second surface, at least one active electronic circuit component, operatively integrated within said flexible base layer, and at least one first patterned contact layer, provided on any one of said first surface and said second surface of said flexible base layer and which is configured to operably interface with said at least one active electronic circuit component and the at least one 1C component.Type: ApplicationFiled: January 31, 2020Publication date: April 28, 2022Inventors: Brian COBB, Scott WHITE, Ken WILLIAMSON, Anthony SOU, Catherine RAMSDALE, Rob MANN, Neil DAVIES, Joao de OLIVEIRA, Gillian EWERS, Pascaline BOULANGER, Richard PRICE
-
Patent number: 11215078Abstract: A gas turbine engine for an aircraft including a unit supplied with oil from a first oil circuit and a second oil circuit. The first oil circuit and the second oil circuit each are fluidly coupled with at least one inlet and with at least one outlet of the unit and with at least one inlet and with at least one outlet of an oil tank. The first oil circuit and the second oil circuit are configured to receive oil from the oil tank and to direct the received oil to the unit. The oil tank is incorporating offset outlets to each of the oil circuits. The offset outlet of the second oil circuit is positioned higher in the oil tank than the offset outlet of the first oil circuit.Type: GrantFiled: April 12, 2019Date of Patent: January 4, 2022Assignees: Rolls-Royce Deutschland Ltd & Co. KG, Rolls-Royce PLCInventors: Stefan Menczykalski, Stephan Uhkoetter, John R. Mason, David A. Edwards, Neil Davies, Lynn Hammond, David Williams
-
Patent number: 11177145Abstract: A method of manufacturing a plurality of electronic circuits is disclosed. Each electronic circuit comprises a respective first portion, comprising a respective group of contact pads, and a respective integrated circuit, IC, comprising a respective group of terminals and mounted on the respective group of contact pads with each terminal in electrical contact with a respective contact pad. The method comprises: providing a first structure comprising the plurality of first portions; providing a second structure comprising the plurality of ICs and a common support arranged to support the plurality of ICs; transferring said ICs from the common support onto a first roller having a removable surface portion; and transferring said ICs from the first roller onto the first structure such that each group of terminals is mounted on a respective group of contact pads.Type: GrantFiled: June 18, 2018Date of Patent: November 16, 2021Assignee: PRAGMATIC PRINTING LTD.Inventors: Neil Davies, Richard Price, Stephen Devenport, Stuart Speakman
-
Publication number: 20210307225Abstract: The invention relates to a thermode for connecting at least two components, comprising a tip having a body portion with at least two contact surface portions connected to and spaced apart from one another by a recess configured to receive a portion of one of the at least two components; and a support portion having at least one supporting surface portion configured to support a further component (being the other of the at least two components, wherein the contact surface portions and the supporting surface portion are configured to receive the at least two components between them and wherein one or both of the contact surface portions and the supporting surface portion are moveable relative to and towards one another to exert heat and/or pressure on the at least two components located between the contact surface portions and the supporting portion.Type: ApplicationFiled: July 30, 2019Publication date: September 30, 2021Inventors: Neil DAVIES, Stephen DEVENPORT, Richard PRICE
-
Patent number: 11131214Abstract: A gas turbine engine includes a gearbox receiving input from a core shaft and driving a fan at a lower speed than the core shaft. First and second oil circuits fluidly couple with an inlet and outlet of the gearbox. A third oil circuit fluidly couples with an inlet and outlet of the gearbox. The outlet of the gearbox includes a device directing oil from the gearbox to the first oil circuit, to the second oil circuit and to the third oil circuit when feeding to the gearbox exceeds a predefined oil flow rate, or deviates an operational value corresponding with that oil flow rate, and directs oil from the gearbox to the third oil circuit when feeding to the gearbox is ? the predefined flow rate or is ? a corresponding operational value or is greater than or equal to a further corresponding operational value.Type: GrantFiled: April 12, 2019Date of Patent: September 28, 2021Assignees: ROLLS-ROYCE DEUTSCHLAND LTD & CO KG, ROLLS-ROYCE PLCInventors: Stefan Menczykalski, Stephan Uhkoetter, John R. Mason, David A. Edwards, Neil Davies, Lynn Hammond, David Williams
-
Publication number: 20210074563Abstract: The invention relates to a system for manufacturing a plurality of integrated circuits, IC, mounted on a common support, the system comprising: an input station configured (adapted, arranged) to receive at least one common support; an output station configured (adapted, arranged) to receive at least one common support having a plurality of integrated circuits formed thereon; a plurality of processing modules each module being operable (configured, arranged, adapted) to perform at least one of the processing steps (e.g. deposition, patterning, etching) for forming an integrated circuit on the common support; a transfer means operable (configured, arranged, adapted) to transfer the at least one common support from the input station to the output station and to one or more of the processing modules therebetween; control means (e.g.Type: ApplicationFiled: January 30, 2019Publication date: March 11, 2021Inventors: Richard David PRICE, Neil DAVIES, Scott WHITE, Thomas Stanley VAN DEN HEEVER, Kenneth David WILLIAMSON, Nathaniel James GREEN
-
Publication number: 20210036034Abstract: The present invention provides processes for manufacturing a plurality of discrete integrated circuits (ICs) on a carrier, the process comprising the steps of: providing a carrier for a flexible substrate; depositing a flexible substrate of uniform thickness on said carrier; removing at least a portion of the thickness of the flexible substrate from at least a portion of the IC connecting areas to form channels in the flexible substrate and a plurality of IC substrate units spaced apart from one another on the carrier by said channels; forming an integrated circuit on at least one of the IC substrate units.Type: ApplicationFiled: January 30, 2019Publication date: February 4, 2021Inventors: Richard PRICE, Brian COBB, Neil DAVIES
-
Patent number: 10811383Abstract: A method of manufacturing a plurality of electronic circuits is disclosed. Each electronic circuit comprises a respective first portion, comprising a respective group of contact pads, and a respective integrated circuit, IC, comprising a respective group of terminals and mounted on the respective group of contact pads with each terminal in electrical contact with a respective contact pad. The method comprises: providing a first structure comprising the plurality of first portions; providing a second structure comprising the plurality of ICs and a common support arranged to support the plurality of ICs; transferring said ICs from the common support onto a first roller; transferring said ICs from the first roller onto a second roller; and transferring said ICs from the second roller onto the first structure such that each group of terminals is mounted on a respective group of contact pads.Type: GrantFiled: February 9, 2017Date of Patent: October 20, 2020Assignee: PRAGMATIC PRINTING LTD.Inventors: Neil Davies, Richard David Price, Stephen Devenport, Stuart Philip Speakman