Abstract: The invention provides for a diagnostic probe assembly for a tester which is used to diagnose printhead integrated circuits. The probe assembly includes a support assembly and a controller board mounted on the support assembly and having a processor configured to generate test signals for testing a printhead integrated circuit. A routing board is in operative signal communication with the controller board and is configured to multiplex the generated test signals for respective dies of the printhead integrated circuits. The probe assembly also includes a probe interface in signal communication with the routing board and configured for relaying the multiplexed test signals to and from the respective dies.

Abstract: A testing apparatus for testing integrated circuits mounted in a carrier includes a support assembly. A controller is mounted in the support assembly. The controller is programmed to process test signals from the integrated circuits. A retaining assembly is arranged on the support assembly and is configured to receive and retain the carrier during testing. A displacement mechanism is arranged on the support assembly for displacing the retaining assembly relative to the support assembly into and out of an operative condition. Testing circuitry is operatively connected to the controller and has at least test signal generation and measurement circuitry and adaptor circuitry for operative engagement with the integrated circuits being tested, the adaptor circuitry being configured to provide both a physical and an electrical interface with the integrated circuits.

Abstract: A method for testing integrated circuits mounted on a carrier includes the step of securing the carrier. The carrier is displaced into an operative position in which the integrated circuits are in physical and electrical communication with a diagnostic probe. Test signals are generated in test circuitry in electrical communication with the diagnostic probe and communicated to the integrated circuits with the diagnostic probe. The test signals are received at the test circuitry via the diagnostic probe. The test signals are made available to a controller via a communications link and an automated server and displayed with the controller.

Abstract: The invention provides for a diagnostic probe assembly for a tester which is used to diagnose printhead integrated circuits. The probe assembly includes a support assembly and a controller board mounted on the support assembly and having a processor configured to generate test signals for testing a printhead integrated circuit. A routing board is in operative signal communication with the controller board and is configured to multiplex the generated test signals for respective dies of the printhead integrated circuits. The probe assembly also includes a probe interface in signal communication with the routing board and configured for relaying the multiplexed test signals to and from the respective dies.

Abstract: A testing apparatus for testing integrated circuits mounted in a carrier includes a support assembly. A controller is mounted in the support assembly. The controller is programmed to process test signals from the integrated circuits. A retaining assembly is arranged on the support assembly and is configured to receive and retain the carrier during testing. A displacement mechanism is arranged on the support assembly for displacing the retaining assembly relative to the support assembly into and out of an operative condition. Testing circuitry is operatively connected to the controller and has at least test signal generation and measurement circuitry and adaptor circuitry for operative engagement with the integrated circuits being tested, the adaptor circuitry being configured to provide both a physical and an electrical interface with the integrated circuits.

Abstract: The invention provides for a system for testing integrated circuitry. The system includes a local computational device, a communications link connected to the computational device, and testing circuitry operatively connected to the computational device via the communications link and configured to generate integrated circuitry test signals. The system also includes adaptor circuitry connected to the testing circuitry and configured to provide an electrical and physical interface with the integrated circuits, as well as routing circuitry interposed between the testing and adaptor circuitry to rout the test signals to respective dies of the integrated circuits. Also included is a handling mechanism for retaining and manipulating a carrier on which the integrated circuits are positioned, and a controller operatively connected to the handling mechanism for controlling operation thereof and connected to the communications device for supervision by the computational device.

Abstract: A method for testing integrated circuits mounted on a carrier includes the step of securing the carrier. The carrier is displaced into an operative position in which the integrated circuits are in physical and electrical communication with a diagnostic probe. Test signals are generated in test circuitry in electrical communication with the diagnostic probe and communicated to the integrated circuits with the diagnostic probe. The test signals are received at the test circuitry via the diagnostic probe. The test signals are made available to a controller via a communications link and an automated server and displayed with the controller.