Abstract: A solid state drive includes DRAM logical flash and flash memory, in which system processor reads and writes only to the DRAM logical flash which minimizes writes to the flash memory. A method for operation of a solid state flash device includes writing, by a CPU, to a solid state drive by sending commands and data to DRAM logical flash using flash commands and formatting.

Abstract: A solid state drive (SSD) includes dynamic random access memory (DRAM), flash memory, and a solid state drive (SSD) controller. The solid state drive (SSD) also includes a peripheral component interconnect express (PCIe) bus to connect the SSD to a computing device such that a central processing unit (CPU) of the computing device exclusively reads data from, and writes data to, the DRAM. The SSD controller writes data to the flash memory from the DRAM independently of received commands from the computing device.

Abstract: A solid state drive (SSD) includes dynamic random access memory (DRAM), flash memory, and a solid state drive (SSD) controller. The solid state drive (SSD) also includes a peripheral component interconnect express (PCIe) bus to connect the SSD to a computing device such that a central processing unit (CPU) of the computing device exclusively reads data from, and writes data to, the DRAM. The SSD controller writes data to the flash memory from the DRAM independently of received commands from the computing device.

Abstract: A solid state drive includes DRAM logical flash and flash memory, in which system processor reads and writes only to the DRAM logical flash which minimizes writes to the flash memory. A method for operation of a solid state flash device includes writing, by a CPU, to a solid state drive by sending commands and data to DRAM logical flash using flash commands and formatting.

Abstract: A solid state drive includes DRAM logical flash and flash memory, in which system processor reads and writes only to the DRAM logical flash which minimizes writes to the flash memory. A method for operation of a solid state flash device includes writing, by a CPU, to a solid state drive by sending commands and data to DRAM logical flash using flash commands and formatting.

Abstract: An audio amplifier system includes a delta-sigma modulator configured to receive an m-bit digital audio input signal and to generate a pulse density modulated signal based on the m-bit digital audio input signal. An analog power stage is coupled to the delta-sigma modulator to receive the pulse density modulated signal and amplify the pulse density modulated signal to generate an amplified pulse density modulated signal. A feedback circuit is coupled to the delta-sigma modulator and the analog power stage. The feedback circuit is configured to receive the amplified pulse density modulated signal and the pulse density modulated signal and to determine a digital error signal representative of a difference between the amplified pulse density modulated signal and the pulse density modulated signal. The feedback circuit is further configured to provide the digital error signal to the delta-sigma modulator for applying the digital error signal to a representation of the m-bit digital audio input signal.

Abstract: A solid state drive (SSD) includes dynamic random access memory (DRAM), flash memory, and a solid state drive (SSD) controller. The solid state drive (SSD) also includes a peripheral component interconnect express (PCIe) bus to connect the SSD to a computing device such that a central processing unit (CPU) of the computing device exclusively reads data from, and writes data to, the DRAM. The SSD controller writes data to the flash memory from the DRAM independently of received commands from the computing device.

Abstract: An audio amplifier system includes a delta-sigma modulator configured to receive an m-bit digital audio input signal and to generate a pulse density modulated signal based on the m-bit digital audio input signal. An analog power stage is coupled to the delta-sigma modulator to receive the pulse density modulated signal and amplify the pulse density modulated signal to generate an amplified pulse density modulated signal. A feedback circuit is coupled to the delta-sigma modulator and the analog power stage. The feedback circuit is configured to receive the amplified pulse density modulated signal and the pulse density modulated signal and to determine a digital error signal representative of a difference between the amplified pulse density modulated signal and the pulse density modulated signal. The feedback circuit is further configured to provide the digital error signal to the delta-sigma modulator for applying the digital error signal to a representation of the m-bit digital audio input signal.

Abstract: A solid state drive includes DRAM logical flash and flash memory, in which system processor reads and writes only to the DRAM logical flash which minimizes writes to the flash memory. A method for operation of a solid state flash device includes writing, by a CPU, to a solid state drive by sending commands and data to DRAM logical flash using flash commands and formatting.

Abstract: A solid state drive includes DRAM logical flash and flash memory, in which system processor reads and writes only to the DRAM logical flash which minimizes writes to the flash memory. A method for operation of a solid state flash device includes writing, by a CPU, to a solid state drive by sending commands and data to DRAM logical flash using flash commands and formatting.

Abstract: A solid state drive includes DRAM logical flash and flash memory, in which system processor reads and writes only to the DRAM logical flash which minimizes writes to the flash memory. A method for operation of a solid state flash device includes writing, by a CPU, to a solid state drive by sending commands and data to DRAM logical flash using flash commands and formatting.

Abstract: An apparatus for generating data for long duration calls includes: call sensors distributed across a network for detecting call messages, correlating call messages relating to a call, and for storing call message related information, including at least one of the call network endpoints in an at least partial correlated call record; a time detection module for determining which network endpoints are located in a time standard that has just passed, or is about to pass, a predetermined time; and a call record controller for providing a control signal instructing at least some call sensors to determine whether any correlated call records relate to a call that includes one of the determined network endpoints and that started more than a predetermined time period prior to the predetermined time. The call sensors generate and transmit for storage an interim call data record (CDR) for each of the determined correlated call records.

Abstract: A telecommunications network has a plurality of call sensors (10) for detecting call messages (34). The call sensors (10) correlate call messages relating to the same call occurring between an originating network endpoint and a destination network endpoint and store information relating to those call messages in a correlated call record, including at least one of the network endpoints for the call. In order to provide daily information relating to calls of long duration, a call record controller (18) determines which of the network endpoints (10) are located in a time standard that has just passed, or is about to pass, midnight and instructs all or some call sensors to determine whether any of the correlated call records relate to a call that includes one of the determined network endpoints and that started more than 24 hours previously.

Abstract: This disclosure relates to a method and composition for cleaning and inhibiting solid, bitumin tar, and viscous fluid deposition in well equipment used in conjunction with a water-based well fluid which includes mixing an effective amount of a miscible terpene in the well fluid. In one embodiment, a method for cleaning and inhibiting deposits in and on well equipment used in conjunction with a water-based well fluid which includes mixing an effective amount of d-limonene into the well fluid is disclosed.

Abstract: This disclosure relates to a method and composition for cleaning and inhibiting solid, bitumin tar, and viscous fluid deposition in well equipment used in conjunction with a water-based well fluid which includes mixing an effective amount of a miscible terpene in the well fluid. In one embodiment, a method for cleaning and inhibiting deposits in and on well equipment used in conjunction with a water-based well fluid which includes mixing an effective amount of d-limonene into the well fluid is disclosed.