Patents by Inventor Neil O. Fanning

Neil O. Fanning has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120219000
    Abstract: A network switch includes a look-up engine for obtaining associated data in response to a header portion of a packet and an interlinked network processor such as a RISC for performing a processing function on the header portion or the associated data. Both look-up engine and the network processor may modify a destination port bitmask. The network processor may implement additional packet header processing required for replication or server load balancing.
    Type: Application
    Filed: May 1, 2012
    Publication date: August 30, 2012
    Inventors: Sorcha O'CALLAGHAN, Neil O. Fanning, Kevin Jennings, Eugene O'Neill, Joseph Butler
  • Patent number: 8194672
    Abstract: A network switch includes a look-up engine for obtaining associated data in response to a header portion of a packet and an interlinked network processor such as a RISC for performing a processing function on the header portion or the associated data. Both look-up engine and the network processor may modify a destination port bitmask. The network processor may implement additional packet header processing required for replication or server load balancing.
    Type: Grant
    Filed: March 2, 2010
    Date of Patent: June 5, 2012
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Sorcha O'Callaghan, Neil O Fanning, Kevin Jennings, Eugene O'Neill, Joseph N Butler
  • Publication number: 20100158028
    Abstract: A network switch includes a look-up engine for obtaining associated data in response to a header portion of a packet and an interlinked network processor such as a RISC for performing a processing function on the header portion or the associated data. Both look-up engine and the network processor may modify a destination port bitmask. The network processor may implement additional packet header processing required for replication or server load balancing.
    Type: Application
    Filed: March 2, 2010
    Publication date: June 24, 2010
    Inventors: Sorcha O'Callaghan, Neil O. Fanning, Kevin Jennings, Eugene O'Nell, Joseph N. Butler
  • Patent number: 7701941
    Abstract: A network switch includes a look-up engine for obtaining associated data in response to a header portion of a packet and an interlinked network processor such as a RISC for performing a processing function on the header portion or the associated data. Both look-up engine and the network processor may modify a destination port bitmask. The network processor may implement additional packet header processing required for replication or server load balancing.
    Type: Grant
    Filed: March 28, 2001
    Date of Patent: April 20, 2010
    Assignee: 3Com Corporation
    Inventors: Sorcha O'Callaghan, Neil O Fanning, Kevin Jennings, Eugene O'Neill, Joseph N Butler
  • Patent number: 6543027
    Abstract: An application specific integrated circuit includes a clock recovery circuit which recovers from an input signal a repetitive sequence of data values wherein no two consecutive values are the same and a recovered clock. An address generator responds to the recovered clock to cause storage of the data values in said memory in a set of locations having addresses generated by the address generator, so that the address generated by the generator increments in response to a repetitive transition in the recovered clock. The existence of a clock glitch is found by reading the data values from the set of locations to determine whether any two consecutive locations contain the same data value.
    Type: Grant
    Filed: September 28, 2000
    Date of Patent: April 1, 2003
    Assignee: 3Com Corporation
    Inventors: Mark A Hughes, Joseph N Butler, Neil O Fanning
  • Patent number: 6438717
    Abstract: A high speed link between chips and comprising a multiplicity of synchronous serial data channels includes an onboard detector for detecting an error rate for each channel. The transmitter and the receiver chips are configured in response to the detector to select the channel having the lowest error rate as the control channel and optionally to render at least the channel with the highest error rate inactive.
    Type: Grant
    Filed: November 9, 1999
    Date of Patent: August 20, 2002
    Assignee: 3Com Corporation
    Inventors: Joseph N Butler, Mark A Hughes, Neil O Fanning, Eugene O'Neill, Una Quinlan
  • Publication number: 20020101867
    Abstract: A network switch includes a look-up engine for obtaining associated data in response to a header portion of a packet and an interlinked network processor such as a RISC for performing a processing function on the header portion or the associated data. Both look-up engine and the network processor may modify a destination port bitmask. The network processor may implement additional packet header processing required for replication or server load balancing.
    Type: Application
    Filed: March 28, 2001
    Publication date: August 1, 2002
    Inventors: Sorcha O'Callaghan, Neil O. Fanning, Kevin Jennings, Eugene O'Neill, Joseph N. Butler
  • Patent number: 6275880
    Abstract: A plurality of serial data streams are transmitted on a corresponding plurality of lines at a common frequency in equal groups of symbols. A framing signal composed of groups of symbols corresponding in number to groups of data symbols is transmitted on an additional control line. Each group of symbols in the framing signal includes a majority of symbols capable of representing a first plurality of code words and a second plurality, substantially less than the first plurality, of valid code words, and a minority of symbols which constitute parity check symbols. Each of the valid code words consists of a first sub-group of similar symbols and a second plurality of similar symbols. For some of the valid code words the symbols in the first sub-group are similar to the symbols in the second sub-group. For other valid code words the symbols in the first sub-group are different from the symbols in the second sub-group.
    Type: Grant
    Filed: February 22, 1999
    Date of Patent: August 14, 2001
    Assignee: 3Com Technologies
    Inventors: Una Quinlan, Con Cremin, Eugene O'Neill, J. Noel Butler, Mark A. Hughes, Neil O. Fanning