Abstract: An imaging device includes an image detector that includes an array of digital pixels, each digital pixel including an output that provides a digital pixel output pulse each time a charge stored in the digital pixel exceeds a threshold and a readout integrated circuit (ROIC) connected to the output of each of the digital pixels to receive the digital pixel output pulse from each pixel, the ROIC including a plurality of accumulators, each of the plurality of accumulators associated with a respective digital pixel. The imaging device also includes a controller that reads the accumulators to determine a number of digital pixel output pulses stored by the accumulators without stopping the generation of digital pixel output pulses.

Abstract: An imaging device includes an image detector that includes an array of digital pixels, each digital pixel including an output that provides a digital pixel output pulse each time a charge stored in the digital pixel exceeds a threshold and a readout integrated circuit (ROIC) connected to the output of each of the digital pixels to receive the digital pixel output pulse from each pixel, the ROIC including a plurality of accumulators, each of the plurality of accumulators associated with a respective digital pixel. The imaging device also includes a controller that reads the accumulators to determine a number of digital pixel output pulses stored by the accumulators without stopping the generation of digital pixel output pulses.

Abstract: A digital pixel includes a capacitive transimpedance amplifier (CTIA) coupled to a photodiode that receives an electrical charge and output an integration voltage. An integration capacitor coupled to the CTIA accumulates the integration voltage over an integration period. A comparator compares the accumulated integration voltage with a threshold voltage and generates a control signal at a first level each time the accumulated integration voltage is greater than the threshold voltage. A charge subtraction circuit receives the control signal at the first level and discharges the accumulated integration voltage each time the control signal at the first level is received from the comparator. An analog or digital counter receives the control signal at the first level and adjusts a counter value each time the control signal is received from the comparator. An output interface communicates the counter value to an image processing circuit at an end of the integration period.

Abstract: A digital pixel includes a capacitive transimpedence amplifier (CTIA) coupled to a photodiode that receives an electrical charge and output an integration voltage. An integration capacitor coupled to the CTIA accumulates the integration voltage over an integration period. A comparator compares the accumulated integration voltage with a threshold voltage and generates a control signal at a first level each time the accumulated integration voltage is greater than the threshold voltage. A charge subtraction circuit receives the control signal at the first level and discharges the accumulated integration voltage each time the control signal at the first level is received from the comparator. An analog or digital counter receives the control signal at the first level and adjusts a counter value each time the control signal is received from the comparator. An output interface communicates the counter value to an image processing circuit at an end of the integration period.

Abstract: A three-dimensional (3D) stack is provided and includes a capacitor layer and an integrated circuit (IC) layer. The capacitor layer includes capacitors and capacitor layer connectors respectively communicative with corresponding capacitors. The IC layer is stacked vertically with the capacitor layer and is hybridized to a detector. The IC layer includes IC layer connectors respectively communicative with corresponding capacitor layer connectors.

Abstract: An imaging device includes an image detector that includes an array of digital pixels, each digital pixel including an output that provides a digital pixel output pulse each time a charge stored in the digital pixel exceeds a threshold and a readout integrated circuit (ROIC) connected to the output of each of the digital pixels to receive the digital pixel output pulse from each pixel, the ROIC including a plurality of accumulators, each of the plurality of accumulators associated with a respective digital pixel. The imaging device also includes a controller that reads the accumulators to determine a number of digital pixel output pulses stored by the accumulators without stopping the generation of digital pixel output pulses.

Abstract: A three-dimensional (3D) stack is provided and includes a capacitor layer and an integrated circuit (IC) layer. The capacitor layer includes capacitors and capacitor layer connectors respectively communicative with corresponding capacitors. The IC layer is stacked vertically with the capacitor layer and is hybridized to a detector. The IC layer includes IC layer connectors respectively communicative with corresponding capacitor layer connectors.