Abstract: A micronozzle device can include at least one layer having a plurality of nozzle exits for delivering a mixture of a first fluid and a second fluid, at least one first-fluid header layer having a plurality of first microchannels for receiving the first fluid, at least one first-fluid via layer adjacent the at least one first-fluid header layer to receive the first fluid and direct it to respective ones of the plurality of nozzle exits, at least one second-fluid header layer having a plurality of second microchannels for receiving the second fluid, at least one second-fluid via layer adjacent the at least one second-fluid header layer to receive the second fluid and direct it respective ones of the plurality of nozzle exits, and a plurality of first curtain-gas nozzles located at a first side of the micronozzle device and a plurality of second curtain-gas nozzles located at a second side of the micronozzle device.

Abstract: A micronozzle device can include at least one layer having a plurality of nozzle exits for delivering a mixture of a first fluid and a second fluid, at least one first-fluid header layer having a plurality of first microchannels for receiving the first fluid, at least one first-fluid via layer adjacent the at least one first-fluid header layer to receive the first fluid and direct it to respective ones of the plurality of nozzle exits, at least one second-fluid header layer having a plurality of second microchannels for receiving the second fluid, at least one second-fluid via layer adjacent the at least one second-fluid header layer to receive the second fluid and direct it respective ones of the plurality of nozzle exits, and a plurality of first curtain-gas nozzles located at a first side of the micronozzle device and a plurality of second curtain-gas nozzles located at a second side of the micronozzle device.

Abstract: The invention provides a semiconductor device that is thermally isolated from the printed circuit board such that the device operates at a higher temperature and radiates heat away from the printed circuit board. In another embodiment, the semiconductor is stacked onto a second device and optionally thermally isolated from the second device.

Abstract: A micronozzle device can include at least two layers stacked together to form a nozzle array. Each layer can include a plurality of microchannels that have inlet ports and exit ports. The exit ports can be oriented substantially perpendicular, parallel, or in the general direction of a central fluid flow pathway.

Abstract: The invention provides a semiconductor device that is thermally isolated from the printed circuit board such that the device operates at a higher temperature and radiates heat away from the printed circuit board. In another embodiment, the semiconductor is stacked onto a second device and optionally thermally isolated from the second device.

Abstract: The invention provides a semiconductor device that is thermally isolated from the printed circuit board such that the device operates at a higher temperature and radiates heat away from the printed circuit board. In another embodiment, the semiconductor is stacked onto a second device and optionally thermally isolated from the second device.

Abstract: A wafer level chip scale package (WLCSP) includes a semiconductor device with a plurality of solder bump pads, patterned passivation regions above each of the solder bump pads, a patterned under bump metallization (UBM) region on each of the solder bump pads and the passivation regions, a polyimide region over a portion of the UBM regions and the passivation regions, solder bumps formed on each of the UBM regions.

Abstract: The invention provides a semiconductor device that is thermally isolated from the printed circuit board such that the device operates at a higher temperature and radiates heat away from the printed circuit board. In another embodiment, the semiconductor is stacked onto a second device and optionally thermally isolated from the second device.

Abstract: A semiconductor packaging technique provides for a semiconductor device with improved electrical and thermal performance. According to one embodiment of the invention, die edges are shaped before encapsulation to move the peripheral area of the die, which is more susceptible to stress and cracking, further inside the molding compound. This results in a device that can better withstand stress as well being more resistant to corrosion and other reliability problems caused by environmental conditions.

Abstract: The invention provides a semiconductor device that is thermally isolated from the printed circuit board such that the device operates at a higher temperature and radiates heat away from the printed circuit board. In another embodiment, the semiconductor is stacked onto a second device and optionally thermally isolated from the second device.

Abstract: A wafer level chip scale package (WLCSP) includes a packaged semiconductor device with a plurality of solder bump pads, patterned passivation regions above each of the solder bump pads, a patterned under bump metallization (UBM) region on each of the solder bump pads and the passivation regions, a polyimide region over a portion of the UBM regions and the passivation regions, solder bumps formed on each of the UBM regions, and encapsulation material surrounding the semiconductor die except for at least a portion of each of the solder bumps.

Abstract: A semiconductor packaging technique provides for a semiconductor device with improved electrical and thermal performance. According to one embodiment of the invention, die edges are shaped before encapsulation to move the peripheral area of the die, which is more susceptible to stress and cracking, further inside the molding compound. This results in a device that can better withstand stress as well being more resistant to corrosion and other reliability problems caused by environmental conditions.

Abstract: A semiconductor packaging technique provides for a semiconductor device with improved electrical and thermal performance. According to one embodiment of the invention, die edges are shaped before encapsulation to move the peripheral area of the die, which is more susceptible to stress and cracking, further inside the molding compound. This results in a device that can better withstand stress as well being more resistant to corrosion and other reliability problems caused by environmental conditions.

Abstract: A MOSFET device for RF applications that uses a trench gate in place of the lateral gate used in lateral MOSFET devices is described. The trench gate in the devices of the invention is provided with a single, short channel for high frequency gain. The device of the invention is also provided with an asymmetric oxide in the trench gate, as well as LDD regions that lower the gate-drain capacitance for improved RF performance. Such features allow these devices to maintain the advantages of the LDMOS structure (better linearity), thereby increasing the RF power gain. The trench gate LDMOS of the invention also reduces the hot carrier effects when compared to regular LDMOS devices by reducing the peak electric field and impact ionization. Thus, the devices of the invention will have a better breakdown capability.

Abstract: A protection circuit for use with a charger and a chargeable element, such as a rechargeable lithium ion battery, comprises a shunt regulator having a threshold ON voltage coupled in parallel across the chargeable element, and a temperature-dependent resistor, e.g., a positive temperature coefficient device, coupled in series between the charger and the chargeable element. The temperature dependent resistor is thermally and electrically coupled to the shunt regulator, wherein the first variable resistor limits current flowing through the shunt regulator if the current reaches a predetermined level less than that which would cause failure of the regulator, due to ohmic heating of the regulator.

Abstract: A protection circuit for use with a charger and a chargeable element, such as a rechargeable lithium ion battery, comprises a shunt regulator having a threshold ON voltage coupled in parallel across the chargeable element, and a temperature-dependent resistor, e.g., a positive temperature coefficient device, coupled in series between the charger and the chargeable element. The temperature dependent resistor is thermally and electrically coupled to the shunt regulator, wherein the first variable resistor limits current flowing through the shunt regulator if the current reaches a predetermined level less than that which would cause failure of the regulator, due to ohmic heating of the regulator.

Abstract: A MOSFET device for RF applications that uses a trench gate in place of the lateral gate used in lateral MOSFET devices is described. The trench gate in the devices of the invention is provided with a single, short channel for high frequency gain. The device of the invention is also provided with an asymmetric oxide in the trench gate, as well as LDD regions that lower the gate-drain capacitance for improved RF performance. Such features allow these devices to maintain the advantages of the LDMOS structure (better linearity), thereby increasing the RF power gain. The trench gate LDMOS of the invention also reduces the hot carrier effects when compared to regular LDMOS devices by reducing the peak electric field and impact ionization. Thus, the devices of the invention will have a better breakdown capability.

Abstract: A protection circuit for use with a charger and a chargeable element, such as a rechargeable lithium ion battery, comprises a shunt regulator having a threshold ON voltage coupled in parallel across the chargeable element, and a temperature-dependent resistor, e.g., a positive temperature coefficient device, coupled in series between the charger and the chargeable element. The temperature dependent resistor is thermally and electrically coupled to the shunt regulator, wherein the first variable resistor limits current flowing through the shunt regulator if the current reaches a predetermined level less than that which would cause failure of the regulator, due to ohmic heating of the regulator.

Abstract: A protection circuit for use with a charger and a chargeable element, such as a rechargeable lithium ion battery, comprises a shunt regulator having a threshold ON voltage coupled in parallel across the chargeable element, and a temperature-dependent resistor, e.g., a positive temperature coefficient device, coupled in series between the charger and the chargeable element. The temperature dependent resistor is thermally and electrically coupled to the shunt regulator, wherein the first variable resistor limits current flowing through the shunt regulator if the current reaches a predetermined level less than that which would cause failure of the regulator, due to ohmic heating of the regulator.

Abstract: A semiconductor packaging technique provides for a semiconductor device with improved electrical and thermal performance. According to one embodiment of the invention, die edges are shaped before encapsulation to move the peripheral area of the die, which is more susceptible to stress and cracking, further inside the molding compound. This results in a device that can better withstand stress as well being more resistant to corrosion and other reliability problems caused by environmental conditions.