Abstract: The invention provides a motherboard that uses a high-speed, scalable system bus such as PCI Express® to support two or more high bandwidth graphics slots. The lanes from the motherboard chipset may be directly routed to two or more graphics slots. For instance, the chipset may route (1) thirty-two lanes into two ×16 graphics slots; (2) twenty-four lanes into one ×16 graphics slot and one ×8 graphics slot (the ×8 slot using the same physical connector as a ×16 graphics slot but with only eight active lanes); or (3) sixteen lanes into two ×8 graphics slots (again, physically similar to a ×16 graphics slot but with only eight active lanes). Alternatively, a switch can convert sixteen lanes coming from the chipset root complex into two ×16 links that connect to two ×16 graphics slots. The system according to the invention is agnostic to a specific chipset.

Abstract: An accelerated graphics processing subsystem that significantly increases the processing speed of computer graphics commands. The preferred embodiment of this invention presents a first-of-its-kind graphics processing subsystem that combines the processing power of multiple, off-the-shelf, video cards, each one having one or more graphic processor units. The video cards can be used without substantial modification. Under the preferred embodiment, each video card processes instructions for drawing a predetermined portion of the screen which is displayed to the user through a monitor or other visual output device. The invention harnesses the power of multiple video cards without suffering from the high bandwidth constraints affecting prior attempts at parallel graphics processing subsystems.

Abstract: An accelerated graphics processing subsystem combines the processing power of multiple graphics processing units (GPUs) or video cards. Video processing by the multiple video cards is organized by time division such that each video card is responsible for video data processing during a different time period. For example, two video cards may take turns, with the first video card controlling a display for a certain time period and the second video sequentially assuming video processing duties for a subsequent period. In this way, as one video card is managing the display in one time period, the second video card is processing video data for the for the next time period, thereby allowing extensive processing of the video data before the start of the next time period. The present invention may further incorporate load balancing such that the duration of the processing time periods for each of the video cards is dynamically modified to maximize composite video processing.

Abstract: A self-loading bit driver tool has a handle generally defining a predetermined axis. A support member, slidably mounted on the handle, moves generally parallel to the axis from proximate to remote positions. Bit storage—a cartridge, cassette or cylinder—stores a number of driver bits and is removably mounted on the support member and adjustably located at its remote end so as to selectively and successively place each stored driver bit along the is of that member. A barrel downstream of the support member and a push rod permanently connected to the handle move along with the member and receive and support the bit driver while the tool is being used. When the support member is moved to a proximate position, a chosen driver bit can be moved from bit storage into the barrel, or later returned to bit storage by means of a magnetic element.

Abstract: An accelerated graphics processing subsystem that significantly increases the processing speed of computer graphics commands. The preferred embodiment of this invention presents a first-of-its-kind graphics processing subsystem that combines the processing power of multiple, off-the-shelf, video cards, each one having one or more graphic processor units. The video cards can be used without substantial modification. Under the preferred embodiment, each video card processes instructions for drawing a predetermined portion of the screen which is displayed to the user through a monitor or other visual output device. The invention harnesses the power of multiple video cards without suffering from the high bandwidth constraints affecting prior attempts at parallel graphics processing subsystems.

Abstract: An accelerated graphics processing subsystem that significantly increases the processing speed of computer graphics commands. The preferred embodiment of this invention presents a first-of-its-kind graphics processing subsystem that combines the processing power of multiple, off-the-shelf, video cards, each one having one or more graphic processor units. The video cards can be used without substantial modification. Under the preferred embodiment, each video card processes instructions for drawing a predetermined portion of the screen which is displayed to the user through a monitor or other visual output device. The invention harnesses the power of multiple video cards without suffering from the high bandwidth constraints affecting prior attempts at parallel graphics processing subsystems.

Abstract: The present invention provides a motherboard that uses a high-speed, scalable system bus such as PCI Express® to support two or more high bandwidth graphics slots, each capable of supporting an off-the-shelf video controller. The lanes from the motherboard chipset may be directly routed to two or more graphics slots. For instance, the chipset may route (1) thirty-two lanes into two ×16 graphics slots; (2) twenty-four lanes into one ×16 graphics slot and one ×8 graphics slot (the ×8 slot using the same physical connector as a ×16 graphics slot but with only eight active lanes); or (3) sixteen lanes into two ×8 graphics slots (again, physically similar to a ×16 graphics slot but with only eight active lanes). Alternatively, a switch can convert sixteen lanes coming from the chipset root complex into two ×16 links that connect to two ×16 graphics slots. Each and every embodiment of the present invention is agnostic to a specific chipset.

Abstract: An accelerated graphics processing subsystem that significantly increases the processing speed of computer graphics commands. The preferred embodiment of this invention presents a first-of-its-kind graphics processing subsystem that combines the processing power of multiple, off-the-shelf, video cards, each one having one or more graphic processor units. The video cards can be used without substantial modification. Under the preferred embodiment, each video card processes instructions for drawing a predetermined portion of the screen which is displayed to the user through a monitor or other visual output device. The invention harnesses the power of multiple video cards without suffering from the high bandwidth constraints affecting prior attempts at parallel graphics processing subsystems.