Patents by Inventor Nersi Nazari
Nersi Nazari has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230147605Abstract: An unobtrusive ambulatory wearable biosensor device, system, and method continuously monitors blood oxygen saturation of a patient in their free-living conditions. The wearable biosensor system may include a finger sensor device, wrist module device, relay device, and wearable sensor patch.Type: ApplicationFiled: November 5, 2021Publication date: May 11, 2023Inventors: Nersi Nazari, Olivier Colliou, Wenkang Qi
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Publication number: 20220384036Abstract: A method and system of a scalable modular architecture for enabling clinicians to define clinical inputs, operators, and notifications on a per patient and enterprise basis for screening any pathological condition per the clinical practiceType: ApplicationFiled: June 1, 2021Publication date: December 1, 2022Inventors: Ian Felix, Gabriel Nallathambi, Nersi Nazari
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Patent number: 11051745Abstract: A method and system for filtering a detected ECG signal are disclosed. In a first aspect, the method comprises filtering the detected ECG signal using a plurality of digital filters. The method includes adaptively selecting one of the plurality of digital filters to maintain a minimum signal-to-noise ratio (SNR). In a second aspect, the system comprises a wireless sensor device coupled to a user via at least one electrode, wherein the wireless sensor device includes a processor and a memory device coupled to the processor, wherein the memory device stores an application which, when executed by the processor, causes the processor to carry out the steps of the method.Type: GrantFiled: February 16, 2017Date of Patent: July 6, 2021Assignee: Vital Connect, Inc.Inventors: Ravi Narasimhan, Nersi Nazari, Nima Ferdosi
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Patent number: 10123716Abstract: A method and system for filtering a detected ECG signal are disclosed. In a first aspect, the method comprises filtering the detected ECG signal using a plurality of digital filters. The method includes adaptively selecting one of the plurality of digital filters to maintain a minimum signal-to-noise ratio (SNR). In a second aspect, the system comprises a wireless sensor device coupled to a user via at least one electrode, wherein the wireless sensor device includes a processor and a memory device coupled to the processor, wherein the memory device stores an application which, when executed by the processor, causes the processor to carry out the steps of the method.Type: GrantFiled: April 3, 2017Date of Patent: November 13, 2018Assignee: Vital Connect, Inc.Inventors: Ravi Narasimhan, Nersi Nazari, Nima Ferdosi
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Publication number: 20170202473Abstract: A method and system for filtering a detected ECG signal are disclosed. In a first aspect, the method comprises filtering the detected ECG signal using a plurality of digital filters. The method includes adaptively selecting one of the plurality of digital filters to maintain a minimum signal-to-noise ratio (SNR). In a second aspect, the system comprises a wireless sensor device coupled to a user via at least one electrode, wherein the wireless sensor device includes a processor and a memory device coupled to the processor, wherein the memory device stores an application which, when executed by the processor, causes the processor to carry out the steps of the method.Type: ApplicationFiled: April 3, 2017Publication date: July 20, 2017Inventors: Ravi NARASIMHAN, Nersi NAZARI, Nima FERDOSI
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Publication number: 20170156618Abstract: A method and system for filtering a detected ECG signal are disclosed. In a first aspect, the method comprises filtering the detected ECG signal using a plurality of digital filters. The method includes adaptively selecting one of the plurality of digital filters to maintain a minimum signal-to-noise ratio (SNR). In a second aspect, the system comprises a wireless sensor device coupled to a user via at least one electrode, wherein the wireless sensor device includes a processor and a memory device coupled to the processor, wherein the memory device stores an application which, when executed by the processor, causes the processor to carry out the steps of the method.Type: ApplicationFiled: February 16, 2017Publication date: June 8, 2017Inventors: Ravi NARASIMHAN, Nersi NAZARI, Nima FERDOSI
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Patent number: 9636029Abstract: A method and system for filtering a detected ECG signal are disclosed. In a first aspect, the method comprises filtering the detected ECG signal using a plurality of digital filters. The method includes adaptively selecting one of the plurality of digital filters to maintain a minimum signal-to-noise ratio (SNR). In a second aspect, the system comprises a wireless sensor device coupled to a user via at least one electrode, wherein the wireless sensor device includes a processor and a memory device coupled to the processor, wherein the memory device stores an application which, when executed by the processor, causes the processor to carry out the steps of the method.Type: GrantFiled: March 14, 2013Date of Patent: May 2, 2017Assignee: VITAL CONNECT, INC.Inventors: Ravi Narasimhan, Nersi Nazari, Nima Ferdosi
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Patent number: 8136005Abstract: A storage system comprises a linear block encoder. A write circuit writes an output of the linear block encoder to a storage medium. A read circuit reads data from the storage medium. A channel decoder decodes the data. A soft linear block code decoder that decodes the data decoded by the channel decoder. The channel decoder decodes the data read in a first iteration. In a subsequent iteration the channel decoder decodes the data read by the read circuit and utilizes information decoded by the soft linear block code decoder. A threshold check circuit selects an output of the soft linear block code decoder if a number of parity check violations has a first relationship with respect to a threshold, or an output of the channel decoder if the number of parity check violations has a second relationship with respect to the threshold.Type: GrantFiled: October 9, 2007Date of Patent: March 13, 2012Assignee: Marvell International Ltd.Inventors: Nersi Nazari, Zining Wu, Greg A Burd
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Patent number: 7340003Abstract: A storage system for storing data on a storage medium includes an encoder, a linear block encoder, a write circuit, a read circuit, a channel decoder, and a soft linear block code decoder. In a first iteration, the channel decoder decodes data read by the read circuit. In succeeding iterations, the channel decoder decodes the data read by the read circuit and utilizes information decoded by the soft linear block decoder from an immediately preceding iteration. The storage system includes a threshold check circuit to select (i) an output of the soft linear block code decoder if the number of parity-check violations has a first relationship with respect to a threshold, or (ii) an output of the channel decoder if the number of violations has a second relationship with respect to the threshold. The storage system includes a decoder to decode an output of the threshold check circuit.Type: GrantFiled: August 27, 2004Date of Patent: March 4, 2008Assignee: Marvell International Ltd.Inventors: Nersi Nazari, Zining Wu, Greg Burd
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Patent number: 6888897Abstract: A transmitter is provided for transmitting data to a communication channel and a receiver receives the data from the communication channel. The transmitter comprises an encoder to encode data and a linear block encoder to encode data encoded by the encoder. The receiver comprises a soft channel decoder to decode the data, and a soft linear block code decoder to decode data decoded by the soft channel decoder. In the first iteration, the soft channel decoder decodes data received by the receiver. In succeeding iterations, the soft channel decoder decodes the data received by the receiver and utilizes information from the soft linear block decoder from an immediate preceding iteration. A decision circuit selects an output of the soft linear block decoder if an evaluated criterion is less than a threshold, or an output of the soft channel decoder if the evaluated criterion is greater than the threshold. A decoder decodes an output of the threshold check circuit.Type: GrantFiled: April 27, 2000Date of Patent: May 3, 2005Assignee: Marvell International Ltd.Inventors: Nersi Nazari, Zining Wu, Greg Burd
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Patent number: 6526530Abstract: Method and apparatus for encoding data using check bits for additional data protection, in addition to the time-varying maximum transition run code which eliminates data patterns producing long runs of consecutive transitions. The check bits are inserted into codewords in preselected locations. The time-varying maximum transition run code does not permit more than j transitions beginning from an even-numbered sample period and does not permit more than j+l transitions beginning from an odd-numbered sample period, wherein j>1. This time-varying maximum transition run constraint is preserved even after the check bits are inserted, regardless of the bit values of the check bits.Type: GrantFiled: December 22, 1999Date of Patent: February 25, 2003Assignee: Marvell International, Ltd.Inventors: Nersi Nazari, Andrei Vityaev
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Patent number: 6456208Abstract: In this invention a thirty three bit word is encoded from a thirty two bit word to conform to RLL coding constraints. A parity bit is added to the coded word after coding is complete. With the parity bit inserted the code satisfies a minimum Hamming weight of nine and no more than eleven consecutive zeros and no more than eleven consecutive zeros in both the odd and even interleaves. A table of “bad” eight bit sequences is used to compare the odd and even interleaves of the right and left halves of the input word that is being encoded. If a “bad” sequence is found, its position in the table points to a second table containing a four bit replacement code that is inserted into the coded output word. Flag bits in the output coded word are set to indicate the violation of the coding constraints and provide a means by which a decoder can be used to reverse the process and obtain the original input word.Type: GrantFiled: June 30, 2000Date of Patent: September 24, 2002Assignee: Marvell International, Ltd.Inventors: Nersi Nazari, Andrei Vityaev
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Patent number: 6084535Abstract: A system comprises an encoder, a precoder, a PRML channel, a detector, and a decoder. An input signal is received by the encoder. The encoder generates a code string by adding one or more bits and outputs the code string to the precoder. The encoder applies encoding such that the code string after passing through the precoder has a Hamming distance greater than one to eliminate error events with a small distance at the output of the PRML channel. The present invention also provides codes that after precoding have Hamming distance of 2 and 0 mod 3 number of ones. These codes when used over a PRML channel in an interleaved manner preclude +/-( . . . 010-10 . . . ) error events and error events +/-( . . . 01000-10 . . . ). The code string also has a predetermined minimum number of ones at the output of the PRML channel to help derive a clock from the input signal.Type: GrantFiled: January 30, 1997Date of Patent: July 4, 2000Assignee: Mitel Semiconductor Americas Inc.Inventors: Razmik Karabed, Nersi Nazari, Andrew Popplewell, Isaiah A. Carew
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Patent number: 5809081Abstract: A system comprises an encoder, a precoder, a PR channel, a detector, and a decoder. An input signal is received by the encoder. The encoder generates a code string by adding one or more bits and outputs the code string to the precoder. The encoder applies such encoding such that the code string after being modified by the precoder has a pre-selected parity structure. The encoder provides a systematic encoding scheme in which many of the encoded bits are the same as the input bits used to generate the encoded bits. This systematic approach of the present invention provides an encoder that is easy to implement because a majority of the bits are directly "feed through" and non-trivial logic circuits are only needed to generate the control bits. The systematic encoding also dictates a decoder that is likewise easy to construct and can be implemented in a circuit that simply discards the control bit.Type: GrantFiled: May 20, 1996Date of Patent: September 15, 1998Assignee: Mitel Semiconductor Americas Inc.Inventors: Razmik Karabed, Nersi Nazari
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Patent number: 5809080Abstract: A system and method includes an encoder and noise predictive Viterbi detector tuned such that error events with small values of the unique distance metrics are eliminated so that the error rate is enhanced. The system includes an encoder, a modulator, a PR channel and a detector. An input signal is input to the encoder. The encoder preferably encodes the input string with an even weight code to generate a code string thereby providing high code rates that are easy to implement. The output of the encoder is coupled to the input of the PR channel. The PR channel preferably comprises a filter and a noise source coupled to form a channel, a sampler, a low pass filter and an equalizer. The output of the channel is input to the low pass filter. The output of the low pass filter is coupled by the sampler to the input of the equalizer. Finally, the output of the equalizer is coupled to the input of the detector.Type: GrantFiled: October 10, 1995Date of Patent: September 15, 1998Assignee: Mitel Semiconductor Americas Inc.Inventors: Razmik Karabed, Nersi Nazari
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Patent number: 5646950Abstract: A method is provided for encoding and decoding binary data, using a non-quasicatastrophic and phase invariant matched spectral null code for a partial response channel. The method is particularly suited for partial response systems wherein the order of the higher order null in the transfer function of the partial response channel is .gtoreq.1, resulting in signal-to-noise (SNR) gain at the channel output. In a preferred form, the method is used to develop a rate 3/10 Nyquist-null trellis code.Type: GrantFiled: November 18, 1994Date of Patent: July 8, 1997Assignee: Seagate Technology, Inc.Inventors: Chandra C. Varanasi, Nersi Nazari
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Patent number: 5377133Abstract: An improved system and method is provided for enhanced add-compare-select (ACS) implementation which is particularly adapted to time-nesting or over-lapping of the time offsets for add and compare operations. The compare operation is implemented as a sequential bottom-up procedure whereby two numerical quantities are compared by first declaring one of the quantities as a "contingent" smaller or larger quantity. Subsequently, the least significant bits LSBs of the quantities are compared and the earlier contingent designation is retained unless the smaller of the compared bits is found to correspond to the quantity not previously designated as the "contingent" smaller quantity, whereupon the "contingent" designation is transferred to the previously un-designated quantity corresponding to the smaller of the compared bits.Type: GrantFiled: April 7, 1992Date of Patent: December 27, 1994Assignee: Digital Equipment CorporationInventors: Charles M. Riggle, Nersi Nazari