Patents by Inventor Nestore A. Polce

Nestore A. Polce has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8334451
    Abstract: A photovoltaic (PV) cell device comprises a first semiconductor substrate; a second semiconductor substrate bonded to the first semiconductor substrate; an insulating layer provided between the first and second substrates to electrically isolate the first substrate from the second substrate; a plurality of PV cells defined on the first substrate, each PV cell including a n-type region and a p-type region; a plurality of vertical trenches provided in the first substrate to separated the PV cells, the vertical trenches terminating at the insulating layer; a plurality of isolation structures provided within the vertical trenches, each isolation structure including a first isolation layer including oxide and a second isolation layer including polysilicon; and an interconnect layer patterned to connect the PV cells to provide X number of PV cells in series and Y number of PV cells in parallel.
    Type: Grant
    Filed: October 4, 2004
    Date of Patent: December 18, 2012
    Assignee: IXYS Corporation
    Inventors: Nestore Polce, Ronald P. Clark, Nathan Zommer
  • Publication number: 20050145274
    Abstract: A photovoltaic (PV) cell device comprises a first semiconductor substrate; a second semiconductor substrate bonded to the first semiconductor substrate; an insulating layer provided between the first and second substrates to electrically isolate the first substrate from the second substrate; a plurality of PV cells defined on the first substrate, each PV cell including a n-type region and a p-type region; a plurality of vertical trenches provided in the first substrate to separated the PV cells, the vertical trenches terminating at the insulating layer; a plurality of isolation structures provided within the vertical trenches, each isolation structure including a first isolation layer including oxide and a second isolation layer including polysilicon; and an interconnect layer patterned to connect the PV cells to provide X number of PV cells in series and Y number of PV cells in parallel.
    Type: Application
    Filed: October 4, 2004
    Publication date: July 7, 2005
    Applicant: IXYS Corporation
    Inventors: Nestore Polce, Ronald Clark, Nathan Zommer
  • Publication number: 20050133081
    Abstract: A photovoltaic (PV) device comprising a silicon-on-insulator (SOI) substrate including a first substrate, a second substrate, and an insulating layer provided between the first and second substrates; a plurality of tubs defined using the first substrate, each tub being isolated from an adjacent tub using the insulation layer and an isolation structure; a first PV array including a plurality of PV cells to generate a first voltage when light is shined on the first PV array; a second PV array including a plurality of PV cells to generate a second voltage when the light is shined on the second PV array; a transistor defined on one of the tubs and coupled to the first and second PV arrays, wherein the first PV array is configured to provide a given voltage to the transistor when the second PV array is generating the second voltage.
    Type: Application
    Filed: November 19, 2004
    Publication date: June 23, 2005
    Applicant: IXYS Corporation
    Inventors: Michael Amato, Nestore Polce, Nathan Zommer
  • Patent number: 6696707
    Abstract: A high voltage integrated switching device includes at least one high voltage switching circuit, preferably employing DMOS technology and characterized by a breakdown voltage of at least 100 volts, on a dielectrically isolated, bonded and vertically trenched silicon substrate. Multiple high-voltage switching circuits may be located in close proximity on a single substrate without circuit breakdown or shorting during circuit operation. The circuit may further include one or more low- and/or intermediate-voltage circuits employing, for example, CMOS and bipolar technologies on the same silicon substrate and located in close proximity without voltage breakdown during circuit operation.
    Type: Grant
    Filed: April 23, 1999
    Date of Patent: February 24, 2004
    Assignee: CCP. Clare Corporation
    Inventors: Nestore A. Polce, Scotten W. Jones, Mark F. Heisig
  • Patent number: 6566223
    Abstract: A high voltage integrated switching device includes at least one high voltage switching circuit, preferably employing DMOS technology and characterized by a breakdown voltage of at least 100 volts, on a dielectrically isolated, bonded and vertically trenched silicon substrate. Multiple high-voltage switching circuits may be located in close proximity on a single substrate without circuit breakdown or shorting during circuit operation. The circuit may further include one or more low- and/or intermediate-voltage circuits employing, for example, CMOS and bipolar technologies on the same silicon substrate and located in close proximity without voltage breakdown during circuit operation.
    Type: Grant
    Filed: August 15, 2000
    Date of Patent: May 20, 2003
    Assignee: C. P. Clare Corporation
    Inventors: Nestore A. Polce, Scotten W. Jones, Mark F. Heisig
  • Publication number: 20020056851
    Abstract: A high voltage integrated switching device includes at least one high voltage switching circuit, preferably employing DMOS technology and characterized by a breakdown voltage of at least 100 volts, on a dielectrically isolated, bonded and vertically trenched silicon substrate. Multiple high-voltage switching circuits may be located in close proximity on a single substrate without circuit breakdown or shorting during circuit operation. The circuit may further include one or more low- and/or intermediate-voltage circuits employing, for example, CMOS and bipolar technologies on the same silicon substrate and located in close proximity without voltage breakdown during circuit operation.
    Type: Application
    Filed: April 23, 1999
    Publication date: May 16, 2002
    Inventors: NESTORE A. POLCE, SCOTTEN W. JONES, MARK F. HEISIG
  • Patent number: 6037602
    Abstract: A solid state photovoltaic generator circuit includes a source of activating radiation, an array of photodiodes responsive to the radiation, a switching device coupled to the photodiode array for responding to an electrical signal therefrom, and a high-impedance resistor which is made of substantially single-crystal silicon and is formed during the formation of the switching device. The fabrication of the circuit is thus significantly simplified and the resistor performance is stable over a wide range of operating temperatures.
    Type: Grant
    Filed: February 13, 1998
    Date of Patent: March 14, 2000
    Assignee: C.P. Clare Corporation
    Inventor: Nestore Polce