Patents by Inventor Ng Keong

Ng Keong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060255402
    Abstract: A MOSFET with a 0.7˜2.0 micrometers deep trench is formed by first carrying out a processing step of opening a trench in a semiconductor substrate. A thick insulator layer is then deposited in the trench such that the film at the bottom of the trench is much thicker than the sidewall of the trench. The insulator layer at the sidewall is then removed followed by the creation of composite dual layers that form the Gate Oxide. Another embodiment has the insulator layer deposited after Gate Oxide growth and stop at a thin Nitride layer which serves as stop layer during insulator pullback at trench sidewall and during Polysilicon CMP. Embodiments of the present invention eliminates weak spot at trench bottom corner encountered when Gate Oxide is grown in a 0.2 micrometers deep trench with thick bottom oxide.
    Type: Application
    Filed: May 12, 2005
    Publication date: November 16, 2006
    Inventors: Fwu-Iuan Hshieh, Yee Fai, Ng Keong