Abstract: Methods and apparatus are provided for RF switches (504, 612) integrated in a monolithic RF transceiver IC (500) and switched gain amplifier (600). Multi-gate n-channel enhancement mode FETs (50, 112, 114, Q1-3, Q4-6) are used with single gate FETs (150), resistors (Rb, Rg, Re, R1-R17) and capacitors (C1-C3) formed by the same manufacturing process. The multiple gates (68) of the FETs (50, 112, 114, Q1-3, Q4-6) are parallel coupled, spaced-apart and serially arranged between source (72) and drain (76). When used in pairs (112, 114) to form a switch (504) for a transceiver (500) each FET has its source (74) coupled to an antenna RF I/O port (116, 501) and drains coupled respectively to second and third RF I/O ports (118, 120; 507, 521) leading to the receiver side (530) or transmitter side (532) of the transceiver (500). The gates (136, 138) are coupled to control ports (122, 124; 503, 505; 606, 608).

Abstract: A circuit for protecting an electronic device including a differential nulling avalanche clamp circuit (200, 300) and method of using the circuit in an electronic system (100) to limit radio frequency overdrive. The electronic system (100) includes a surge clamp (130) coupled to dissipate an electrical surge effect of a first frequency from a noise sensitive node (140) and a ring wave clamp (120) coupled to dissipate an electrical surge effect of a second frequency from the noise sensitive node (140). The ring wave clamp circuit (200, 300) includes a first bipolar junction transistor (210, 310), a second bipolar junction transistor (220, 320) coupled to the first bipolar junction transistor (210, 310), and a resistive circuit (230, 330, 340) coupled to the first and second bipolar junction transistors (210, 220, 310, 320).