Patents by Inventor Ngai Yeung Ho

Ngai Yeung Ho has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11009901
    Abstract: Certain aspects of the present disclosure generally relate a regulator. For example, the regulator may include a control stage, a sense capacitor having first and second terminals, the first terminal coupled to an output of the voltage regulator, and a current amplifier having an input coupled to the second terminal of the sense capacitor and an output coupled to the control stage. The control stage of the regulator may adjust the output voltage of the regulator based at least in part on a current generated by the current amplifier.
    Type: Grant
    Filed: November 15, 2017
    Date of Patent: May 18, 2021
    Assignee: QUALCOMM Incorporated
    Inventors: Chi Fan Yung, Hua Guan, Ngai Yeung Ho, Kan Li
  • Patent number: 10749477
    Abstract: Certain aspects of the present disclosure provide methods and apparatus for series voltage regulation in an envelope tracking modulated supply. One example of an envelope tracking modulated supply includes a switched-mode power supply (SMPS), a voltage regulator, and a power amplifier having a supply input coupled to an output of the first voltage regulator. In certain aspects, the first voltage regulator is coupled in series between the power amplifier and two or more outputs the SMPS and is configured to generate a voltage at the output of the first voltage regulator based on an envelope of a signal to be amplified by the first power amplifier.
    Type: Grant
    Filed: September 19, 2019
    Date of Patent: August 18, 2020
    Assignee: QUALCOMM Incorporated
    Inventors: Joseph Duncan, Ngai Yeung Ho, Kevin Lee Cobley
  • Patent number: 10627839
    Abstract: Circuit techniques control multiple regulator circuits. Regulator circuits are configured to time share voltage control circuitry. The voltage control circuitry may include multiple sets of switches to selectively couple a voltage control circuit with a selected voltage regulation loop of one of the regulators.
    Type: Grant
    Filed: August 29, 2016
    Date of Patent: April 21, 2020
    Assignee: QUALCOMM Incorporated
    Inventors: Ngai Yeung Ho, Hua Guan
  • Publication number: 20200099341
    Abstract: Certain aspects of the present disclosure provide methods and apparatus for series voltage regulation in an envelope tracking modulated supply. One example of an envelope tracking modulated supply includes a switched-mode power supply (SMPS), a voltage regulator, and a power amplifier having a supply input coupled to an output of the first voltage regulator. In certain aspects, the first voltage regulator is coupled in series between the power amplifier and two or more outputs the SMPS and is configured to generate a voltage at the output of the first voltage regulator based on an envelope of a signal to be amplified by the first power amplifier.
    Type: Application
    Filed: September 19, 2019
    Publication date: March 26, 2020
    Inventors: Joseph DUNCAN, Ngai Yeung HO, Kevin Lee COBLEY
  • Patent number: 10333393
    Abstract: Certain aspects of the present disclosure provide methods and apparatus for implementing a voltage regulator. The voltage regulator includes a power field effect transistor (FET) comprising a gate terminal. The voltage regulator further includes a charge pump, the charge pump comprising a capacitor switchably coupled to the gate terminal. The voltage regulator further includes a current outputting amplifier switchably coupled to the capacitor.
    Type: Grant
    Filed: September 23, 2016
    Date of Patent: June 25, 2019
    Assignee: QUALCOMM Incorporated
    Inventors: Loai Galal Bahgat Salem, Hua Guan, Ngai Yeung Ho
  • Publication number: 20190146531
    Abstract: Certain aspects of the present disclosure generally relate a regulator. For example, the regulator may include a control stage, a sense capacitor having first and second terminals, the first terminal coupled to an output of the voltage regulator, and a current amplifier having an input coupled to the second terminal of the sense capacitor and an output coupled to the control stage. The control stage of the regulator may adjust the output voltage of the regulator based at least in part on a current generated by the current amplifier.
    Type: Application
    Filed: November 15, 2017
    Publication date: May 16, 2019
    Inventors: Chi Fan YUNG, Hua GUAN, Ngai Yeung HO, Kan LI
  • Patent number: 10274986
    Abstract: An integrated circuit is disclosed for current-controlled voltage regulation. In an example aspect, the integrated circuit includes a voltage regulator and a current-controlled clamp. The voltage regulator has a regulator output node and produces a regulator current. The voltage regulator includes an error amplifier and an output transistor. The error amplifier has first and second input nodes and an error amplifier output node, with the first input node coupled to a reference voltage. The error amplifier generates an error amplifier output voltage at the output node. The output transistor is coupled between the error amplifier output node and the regulator output node. The output transistor is coupled to the second input node via the regulator output node to establish a feedback path for the voltage regulator. The current-controlled clamp is coupled to the error amplifier output node and clamps the error amplifier output voltage based on the regulator current.
    Type: Grant
    Filed: September 22, 2017
    Date of Patent: April 30, 2019
    Assignee: QUALCOMM Incorporated
    Inventors: Chi Fan Yung, Xiaodan Zou, Ngai Yeung Ho, Hua Guan, Kan Li
  • Publication number: 20180284830
    Abstract: An integrated circuit is disclosed for current-controlled voltage regulation. In an example aspect, the integrated circuit includes a voltage regulator and a current-controlled clamp. The voltage regulator has a regulator output node and produces a regulator current. The voltage regulator includes an error amplifier and an output transistor. The error amplifier has first and second input nodes and an error amplifier output node, with the first input node coupled to a reference voltage. The error amplifier generates an error amplifier output voltage at the output node. The output transistor is coupled between the error amplifier output node and the regulator output node. The output transistor is coupled to the second input node via the regulator output node to establish a feedback path for the voltage regulator. The current-controlled clamp is coupled to the error amplifier output node and clamps the error amplifier output voltage based on the regulator current.
    Type: Application
    Filed: September 22, 2017
    Publication date: October 4, 2018
    Inventors: Chi Fan Yung, Xiaodan Zou, Ngai Yeung Ho, Hua Guan, Kan Li
  • Publication number: 20180136680
    Abstract: A voltage regulator control implementation dynamically detects and sets specified headroom for a low dropout (LDO) regulator at different loads to enable the LDO regulator to maintain high performance in conjunction with improved power efficiency. In one instance, an upstream voltage regulator may adaptively adjust an output voltage supplied to an input supply rail of a downstream LDO regulator based on an indication from the LDO regulator. The adaptively adjusted input voltage enables the downstream LDO regulator to achieve high performance and improved power efficiency across the entire range of load conditions.
    Type: Application
    Filed: December 26, 2017
    Publication date: May 17, 2018
    Inventors: Mengmeng DU, Hua GUAN, Ngai Yeung HO, Chi Fan YUNG
  • Publication number: 20180107232
    Abstract: Certain aspects of the present disclosure generally relate a dual feedback loop regulator. For example, the regulator may include a first amplifier having an output coupled to an output node of the regulator, the output node further coupled to a first feedback path and a second feedback path of the regulator. A first input of a second amplifier may be coupled to the first feedback path and a second input of the second amplifier may be coupled to a reference path. The regulator may also include a transconductance stage having a first transistor and a first current source, the first transistor and the current source coupled to the first feedback path and the second feedback path, and a transimpedance stage coupled to the transconductance stage and an input of the first amplifier.
    Type: Application
    Filed: October 18, 2016
    Publication date: April 19, 2018
    Inventors: Chi Fan YUNG, Xiaodan ZOU, Ngai Yeung HO, Kan LI, Hua GUAN
  • Patent number: 9946283
    Abstract: Certain aspects of the present disclosure generally relate a dual feedback loop regulator. For example, the regulator may include a first amplifier having an output coupled to an output node of the regulator, the output node further coupled to a first feedback path and a second feedback path of the regulator. A first input of a second amplifier may be coupled to the first feedback path and a second input of the second amplifier may be coupled to a reference path. The regulator may also include a transconductance stage having a first transistor and a first current source, the first transistor and the current source coupled to the first feedback path and the second feedback path, and a transimpedance stage coupled to the transconductance stage and an input of the first amplifier.
    Type: Grant
    Filed: October 18, 2016
    Date of Patent: April 17, 2018
    Assignee: Qualcomm Incorporated
    Inventors: Chi Fan Yung, Xiaodan Zou, Ngai Yeung Ho, Kan Li, Hua Guan
  • Patent number: 9933801
    Abstract: A voltage regulator may include an auxiliary power device having a first terminal coupled to a control line, a second terminal coupled to an input voltage and a third terminal coupled to an output voltage pad. The voltage regulator may also include a main power device electrically coupled in parallel with the auxiliary power device. A second terminal of the main power device may be coupled to the input voltage, and a third terminal of the main power device may be coupled to the output voltage pad. The voltage regulator may further include a switching system selectively coupling the main power device into and out of the voltage regulator.
    Type: Grant
    Filed: March 29, 2017
    Date of Patent: April 3, 2018
    Assignee: QUALCOMM Incorporated
    Inventors: Hua Guan, Ngai Yeung Ho, Mengmeng Du
  • Publication number: 20180091044
    Abstract: Certain aspects of the present disclosure provide methods and apparatus for implementing a voltage regulator. The voltage regulator includes a power field effect transistor (FET) comprising a gate terminal. The voltage regulator further includes a charge pump, the charge pump comprising a capacitor switchably coupled to the gate terminal. The voltage regulator further includes a current outputting amplifier switchably coupled to the capacitor.
    Type: Application
    Filed: September 23, 2016
    Publication date: March 29, 2018
    Inventors: Loai Galal Bahgat SALEM, Hua GUAN, Ngai Yeung HO
  • Patent number: 9886048
    Abstract: A voltage regulator control implementation dynamically detects and sets specified headroom for a low dropout (LDO) regulator at different loads to enable the LDO regulator to maintain high performance in conjunction with improved power efficiency. In one instance, an upstream voltage regulator may adaptively adjust an output voltage supplied to an input supply rail of a downstream LDO regulator based on an indication from the LDO regulator. The adaptively adjusted input voltage enables the downstream LDO regulator to achieve high performance and improved power efficiency across the entire range of load conditions.
    Type: Grant
    Filed: September 2, 2016
    Date of Patent: February 6, 2018
    Assignee: Qualcomm Incorporated
    Inventors: Mengmeng Du, Hua Guan, Ngai Yeung Ho, Chi Fan Yung
  • Patent number: 9817415
    Abstract: A low drop-out regulator circuit comprises a pass transistor providing an output voltage on an output terminal in response to a gate voltage on a gate of the pass transistor. A feedback circuit is coupled to the output terminal to generate a feedback voltage, and an error amplifier provides a drive signal in response to a reference voltage and the feedback voltage. A first gate driver circuit is operable over a first voltage range to provide the gate voltage to the pass transistor in response to the drive signal. A second gate driver circuit is operable over a second voltage range to provide the gate voltage to the pass transistor in response to the drive signal, where the second voltage range is lower than the first voltage range.
    Type: Grant
    Filed: July 15, 2015
    Date of Patent: November 14, 2017
    Assignee: QUALCOMM Incorporated
    Inventors: Vincenzo F. Peluso, Liangguo Shen, Hua Guan, Mengmeng Du, Ngai Yeung Ho
  • Publication number: 20170322575
    Abstract: A voltage regulator control implementation dynamically detects and sets specified headroom for a low dropout (LDO) regulator at different loads to enable the LDO regulator to maintain high performance in conjunction with improved power efficiency. In one instance, an upstream voltage regulator may adaptively adjust an output voltage supplied to an input supply rail of a downstream LDO regulator based on an indication from the LDO regulator. The adaptively adjusted input voltage enables the downstream LDO regulator to achieve high performance and improved power efficiency across the entire range of load conditions.
    Type: Application
    Filed: September 2, 2016
    Publication date: November 9, 2017
    Inventors: Mengmeng DU, Hua GUAN, Ngai Yeung HO, Chi Fan YUNG
  • Publication number: 20170255214
    Abstract: Circuit techniques control multiple regulator circuits. Regulator circuits are configured to time share voltage control circuitry. The voltage control circuitry may include multiple sets of switches to selectively couple a voltage control circuit with a selected voltage regulation loop of one of the regulators.
    Type: Application
    Filed: August 29, 2016
    Publication date: September 7, 2017
    Inventors: Ngai Yeung HO, Hua GUAN
  • Patent number: 9588541
    Abstract: The embodiments described herein relate to an improved regulator circuit technique having a dual-loop configuration with a current regulation loop to provide the transient response and a voltage regulation loop to provide accurate DC voltage regulation. The current regulation loop comprises a pass transistor, a current sensing transistor, a current summation circuit, and a series of current mirrors to provide a fast load transient response current. The voltage regulation loop includes an output voltage feedback network, an error amplifier, a compensation capacitor, and the current sensing transistor and is configured to provide accurate DC offset regulation to diminish output voltage errors introduced by the transient load currents.
    Type: Grant
    Filed: October 30, 2015
    Date of Patent: March 7, 2017
    Assignee: QUALCOMM Incorporated
    Inventors: Ngai Yeung Ho, Hua Guan
  • Publication number: 20170017250
    Abstract: In one embodiment, the present disclosure includes a low drop-out regulator circuit comprising a pass transistor providing an output voltage on an output terminal in response to a gate voltage on a gate of the pass transistor. A feedback circuit is coupled to the output terminal to generate a feedback voltage, and an error amplifier provides a drive signal in response to a reference voltage and the feedback voltage. A first gate driver circuit is operable over a first voltage range to provide the gate voltage to the pass transistor in response to the drive signal. A second gate driver circuit is operable over a second voltage range to provide the gate voltage to the pass transistor in response to the drive signal, where the second voltage range is lower than the first voltage range.
    Type: Application
    Filed: July 15, 2015
    Publication date: January 19, 2017
    Inventors: Vincenzo F. Peluso, Liangguo Shen, Hua Guan, Mengmeng Du, Ngai Yeung Ho
  • Patent number: 9354649
    Abstract: In one embodiment, a circuit includes a first transistor having a control terminal, a first terminal, and a second terminal where the first transistor is a first device type. The control terminal of the first transistor receives an input signal. The circuit also includes a second transistor having a control terminal, a first terminal, and a second terminal where the second transistor is a second device type. The control terminal of the second transistor is coupled to the second terminal of the first transistor. A voltage shift circuit has an input coupled to the first terminal of the first transistor and an output coupled to the first terminal of the second transistor and a voltage between the input of the voltage shift circuit and an output of the voltage shift circuit increases as a current from the output of the voltage shift circuit increases.
    Type: Grant
    Filed: February 3, 2014
    Date of Patent: May 31, 2016
    Assignee: QUALCOMM, Incorporated
    Inventors: Ngai Yeung Ho, Liangguo Shen, Bing Liu, Vincenzo F Peluso