Abstract: An apparatus includes a differential cascode amplifier including a first transistor and a second transistor. The apparatus further includes a transistor including a source terminal coupled to a gate terminal of the first transistor of the differential cascode amplifier. The transistor also includes a drain terminal coupled to a gate terminal of the second transistor of the differential amplifier.

Abstract: An amplifier is disclosed that may include a filter, such as a notch-filter, to filter an output signal provided by the amplifier. The included filter may suppress and/or reduce a gain of the amplifier for a particular range of frequencies. In one embodiment, a frequency response of the filter may be determined by one or more reactive components included within the amplifier. In at least one embodiment, the amplifier may include two or more mutual inductors to reduce the gain of the amplifier when operated at or near a predetermined frequency. In another embodiment, the amplifier may include one or more variable capacitors that may enable the frequency response of the filter to be changed and/or modified.

Abstract: An amplifier is disclosed that may include a filter, such as a notch-filter, to filter an output signal provided by the amplifier. The included filter may suppress and/or reduce a gain of the amplifier for a particular range of frequencies. In one embodiment, a frequency response of the filter may be determined by one or more reactive components included within the amplifier. In at least one embodiment, the amplifier may include two or more mutual inductors to reduce the gain of the amplifier when operated at or near a predetermined frequency. In another embodiment, the amplifier may include one or more variable capacitors that may enable the frequency response of the filter to be changed and/or modified.

Abstract: A method and apparatus are disclosed for transmitting communication signals through a multi-mode power amplifier. For at least some embodiments, a communication signal may be amplified by an amplifier of the multi-mode power amplifier selected based on a desired transmit output power. The output of the selected amplifier may be coupled through a configurable inductive element to an antenna. The inductive element may be configured as a balun or as an inductive load element based on an operating mode of the multi-mode power amplifier.

Abstract: A method and apparatus are disclosed for transmitting communication signals through a multi-mode power amplifier. For at least some embodiments, a communication signal may be amplified by an amplifier of the multi-mode power amplifier selected based on a desired transmit output power. The output of the selected amplifier may be coupled through a configurable inductive element to an antenna. The inductive element may be configured as a balun or as an inductive load element based on an operating mode of the multi-mode power amplifier.

Abstract: An apparatus includes a differential cascode amplifier including a first transistor and a second transistor. The apparatus further includes a transistor including a source terminal coupled to a gate terminal of the first transistor of the differential cascode amplifier. The transistor also includes a drain terminal coupled to a gate terminal of the second transistor of the differential amplifier.

Abstract: A frequency divider circuit having two stages of transistors has improved performance at low supply voltages. The circuit may include cross-coupled PMOS and NMOS transistors, in which the input signal to be frequency divided is supplied to the body of the PMOS and/or NMOS transistors. The input signal may be coupled to the PMOS and/or NMOS transistors through capacitive or inductive coupling. The input signal to the PMOS and/or NMOS transistors may be generated by a voltage controlled oscillator circuit. With the frequency divider circuit having inputs signals coupled to the body of the PMOS and/or NMOS transistors supply voltages as low as 0.5 Volts may be possible.

Abstract: Techniques for providing a switchable inductor network having configurable inductance in response to a control signal. The switchable inductor network may adopt a fully symmetric architecture to reduce the effects of parasitic elements in differential mode operation. The switchable inductor network is particularly suitable for multi-mode communications circuitry applications, e.g., in the design of a voltage-controlled oscillator (VCO) or an amplifier or buffer in such circuitry.

Abstract: An integrated circuit for transmit and receive matching is described. The integrated circuit includes a transmit amplifier. The transmit amplifier includes a first transistor, a second transistor and a first inductor. The first inductor couples the first transistor to the second transistor. The integrated circuit also includes a low noise amplifier. The low noise amplifier includes a third transistor, a fourth transistor, the first inductor, a second inductor, a third inductor and a transformer. The second inductor couples the first inductor to the third transistor. The third inductor couples the third transistor to ground.

Abstract: A frequency divider circuit having two stages of transistors has improved performance at low supply voltages. The circuit may include cross-coupled PMOS and NMOS transistors, in which the input signal to be frequency divided is supplied to the body of the PMOS and/or NMOS transistors. The input signal may be coupled to the PMOS and/or NMOS transistors through capacitive or inductive coupling. The input signal to the PMOS and/or NMOS transistors may be generated by a voltage controlled oscillator circuit. With the frequency divider circuit having inputs signals coupled to the body of the PMOS and/or NMOS transistors supply voltages as low as 0.5 Volts may be possible.

Abstract: Methods and apparatus for a resonant transmit/receive switch with transformer gate/source coupling. The resonant transmit/receive (T/R) switch includes a switchable inductor having a first inductance value for use in receive (Rx) mode and a second inductance value for use in transmit (Tx) mode. The first inductance value is used for input matching to a low noise amplifier in Rx mode. The second inductance value is selected to resonant with parasitic capacitance of the antenna port to produce a high impedance in Tx mode. In one implementation, the switchable inductor is gate sourced coupled to at least one of first and second inductors of a low noise amplifier (LNA), thereby allowing use of smaller inductors due to the resulting coupling factor.

Abstract: An integrated circuit for transmit and receive matching is described. The integrated circuit includes a transmit amplifier. The transmit amplifier includes a first transistor, a second transistor and a first inductor. The first inductor couples the first transistor to the second transistor. The integrated circuit also includes a low noise amplifier. The low noise amplifier includes a third transistor, a fourth transistor, the first inductor, a second inductor, a third inductor and a transformer. The second inductor couples the first inductor to the third transistor. The third inductor couples the third transistor to ground.

Abstract: Methods and apparatus for a resonant transmit/receive switch with transformer gate/source coupling. The resonant transmit/receive (T/R) switch includes a switchable inductor having a first inductance value for use in receive (Rx) mode and a second inductance value for use in transmit (Tx) mode. The first inductance value is used for input matching to a low noise amplifier in Rx mode. The second inductance value is selected to resonant with parasitic capacitance of the antenna port to produce a high impedance in Tx mode. In one implementation, the switchable inductor is gate sourced coupled to at least one of first and second inductors of a low noise amplifier (LNA), thereby allowing use of smaller inductors due to the resulting coupling factor.

Abstract: Techniques for providing a switchable inductor network having configurable inductance in response to a control signal. The switchable inductor network may adopt a fully symmetric architecture to reduce the effects of parasitic elements in differential mode operation. The switchable inductor network is particularly suitable for multi-mode communications circuitry applications, e.g., in the design of a voltage-controlled oscillator (VCO) or an amplifier or buffer in such circuitry.

Abstract: A system and method of concurrent impedance matching of a wireless transceiver is disclosed. In one embodiment, an impedance matching circuit of a wireless transceiver includes a low noise amplifier (LNA) circuit to amplify an input signal to the wireless transceiver during a reception mode of the wireless transceiver, a power amplifier (PA) circuit to amplify an output signal of the wireless transceiver during a transmission mode of the wireless transceiver, and a matching circuit to concurrently match an impedance of the low noise amplifier circuit and the power amplifier circuit with an impedance of an antenna circuit associated with the wireless transceiver such that a power of the input signal is maximized during the reception mode and a power of the output signal is maximized during the transmission mode.