Abstract: A modulator may include a controller configured to receive in-phase (I) baseband signals and quadrature-phase (Q) baseband signals. The controller may be configured to select a section of a region defined by a number of local oscillator (LO) phases. The controller may be configured to output multiple control signals and a pair of phase selection signals. The modulator may further include multiple output stages. Each output stage may be coupled to the controller to receive a pair of the control signals, the pair of phase selection signals, and multiple offset LO signals. Each of the output stages may include a unit element.

Abstract: A modulator may include a controller configured to receive in-phase (I) baseband signals and quadrature-phase (Q) baseband signals. The controller may be configured to select a section of a region defined by a number of local oscillator (LO) phases. The controller may be configured to output multiple control signals and a pair of phase selection signals. The modulator may further include multiple output stages. Each output stage may be coupled to the controller to receive a pair of the control signals, the pair of phase selection signals, and multiple offset LO signals. Each of the output stages may include a unit element.

Abstract: System providing switchable impedance transformer matching for power amplifiers. In an exemplary implementation, an amplifier providing switchable impedance matching includes an output inductor (L1) that is part of an output path of the amplifier and a first amplifier stage comprising a first inductor (L4) coupled to the output inductor, the first inductor configured to couple a signal amplified by the first amplifier stage at a first power level to the output inductor in response to a first enable signal. The amplifier also includes a second amplifier stage comprising a second inductor (L5) coupled to the output inductor, the second inductor configured to couple the signal amplified by the second amplifier stage at a second power level to the output inductor in response to a second enable signal.

Abstract: A method, an apparatus, and a computer program product are provided. The apparatus tunes a frequency provided by a VCO. The apparatus determines a relative capacitance change associated with a first frequency and a desired frequency from a look-up table. The apparatus adjusts a capacitor circuit in the VCO based on the determined relative capacitance change determined from the look-up table in order to tune from the first frequency to the desired frequency. The apparatus determines that the frequency provided by the VCO is a second frequency different than the desired frequency after adjusting the capacitor circuit. The apparatus performs an iterative search to further adjust the capacitor circuit when a difference between the second frequency and the desired frequency is greater than a threshold.

Abstract: A high frequency divider involves a plurality of differential latches. Each latch includes a pair of cross-coupled P-channel transistors and a variable resistance element. The latch is controlled to have a lower output resistance at high operating frequencies by setting a multi-bit digital control value supplied to the variable resistance element. Controlling the latch to have a reduced output resistance at high frequencies allows the 3 dB bandwidth of the latch to be maintained over a wide operating frequency range. The variable resistance element is disposed between the two differential output nodes of the latch such that appreciable DC bias current does not flow across the variable resistance element. As a consequence, good output signal voltage swing is maintained at high frequencies, and divider current consumption does not increase appreciably at high frequencies as compared to output signal swing degradation and current consumption increases in a conventional differential latch divider.

Abstract: System providing switchable impedance transformer matching for power amplifiers. In an exemplary implementation, an amplifier providing switchable impedance matching includes an output inductor (L1) that is part of an output path of the amplifier and a first amplifier stage comprising a first inductor (L4) coupled to the output inductor, the first inductor configured to couple a signal amplified by the first amplifier stage at a first power level to the output inductor in response to a first enable signal. The amplifier also includes a second amplifier stage comprising a second inductor (L5) coupled to the output inductor, the second inductor configured to couple the signal amplified by the second amplifier stage at a second power level to the output inductor in response to a second enable signal.

Abstract: A low noise amplifier (LNA) with combined input matching, balun, and/or transmit/receive (T/R) switch is described. In one exemplary design, an apparatus includes a coupled inductor and an LNA. The coupled inductor receives a single-ended input signal, performs single-ended to differential conversion, and provides a differential input signal. The LNA receives and amplifies the differential input signal and provides a differential output signal. The coupled inductor includes magnetically coupled first and second coils. The first coil provides input impedance matching when the LNA is enabled. A resonator circuit formed with the first coil provides high input impedance when the LNA is disabled. A tuning capacitor coupled to the second coil provides amplitude imbalance tuning for the differential input signal. A transmit switch is coupled between the first coil and a transmitter.

Abstract: A high frequency divider involves a plurality of differential latches. Each latch includes a pair of cross-coupled P-channel transistors and a variable resistance element. The latch is controlled to have a lower output resistance at high operating frequencies by setting a multi-bit digital control value supplied to the variable resistance element. Controlling the latch to have a reduced output resistance at high frequencies allows the 3 dB bandwidth of the latch to be maintained over a wide operating frequency range. The variable resistance element is disposed between the two differential output nodes of the latch such that appreciable DC bias current does not flow across the variable resistance element. As a consequence, good output signal voltage swing is maintained at high frequencies, and divider current consumption does not increase appreciably at high frequencies as compared to output signal swing degradation and current consumption increases in a conventional differential latch divider.

Abstract: A low noise amplifier (LNA) with combined input matching, balun, and/or transmit/receive (T/R) switch is described. In one exemplary design, an apparatus includes a coupled inductor and an LNA. The coupled inductor receives a single-ended input signal, performs single-ended to differential conversion, and provides a differential input signal. The LNA receives and amplifies the differential input signal and provides a differential output signal. The coupled inductor includes magnetically coupled first and second coils. The first coil provides input impedance matching when the LNA is enabled. A resonator circuit formed with the first coil provides high input impedance when the LNA is disabled. A tuning capacitor coupled to the second coil provides amplitude imbalance tuning for the differential input signal. A transmit switch is coupled between the first coil and a transmitter.

Abstract: A method and apparatus for a variable gain cascode amplifier (or attenuator) is disclosed. Embodiments provide for a compensated input impedance. A gain/impedance controller compensates input impedance corresponding to gain adjustments.

Abstract: A method and apparatus for a variable gain cascode amplifier (or attenuator) is disclosed. Embodiments provide for a compensated input impedance. A gain/impedance controller compensates input impedance corresponding to gain adjustments.