Abstract: An intraocular lens for insertion into a capsular bag in order to focus incoming light toward a retina and process for manufacturing thereof along with concomitant reduced glare and improved vision provides for a center lens portion of a lens for focusing incoming light toward the retina and the surrounding lens portion for mounting the lens within the capsular bag. A surface roughness disposed on the surrounding lens portion is provided for reducing the glare due to non-focused light directed toward the retina from the intraocular lens with the roughness having a roughness level of between about Ra 45 and about Ra 350.

Abstract: An intraocular lens for insertion into a capsular bag in order to focus incoming light toward a retina and process for manufacturing thereof along with concomitant reduced glare and improved vision provides for a center lens portion of a lens for focusing incoming light toward the retina and the surrounding lens portion for mounting the lens within the capsular bag. A surface roughness disposed on the surrounding lens portion is provided for reducing the glare due to non-focused light directed toward the retina from the intraocular lens with the roughness having a roughness level of between about Ra 45 and about Ra 350.

Abstract: An intraocular lens for insertion into a capsular bag in order to focus incoming light toward a retina and process for manufacturing thereof along with concomitant reduced glare and improved vision provides for a center lens portion of a lens for focusing incoming light toward the retina and the surrounding lens portion for mounting the lens within the capsular bag. A surface roughness disposed on the surrounding lens portion is provided for reducing the glare due to non-focused light directed toward the retina from the intraocular lens with the roughness having a roughness level of between about Ra 45 and about Ra 350.

Abstract: An intraocular lens for insertion into a capsular bag in order to focus incoming light toward a retina and process for manufacturing thereof along with concomitant reduced glare and improved vision provides for a center lens portion of a lens for focusing incoming light toward the retina and the surrounding lens portion for mounting the lens within the capsular bag. A surface roughness disposed on the surrounding lens portion is provided for reducing the glare due to non-focused light directed toward the retina from the intraocular lens with the roughness having a roughness level of between about Ra 45 and about Ra 350.

Abstract: An intraocular lens for insertion into a capsular bag in order to focus incoming light toward a retina and process for manufacturing thereof along with concomitant reduced glare and improved vision provides for a center lens portion of a lens for focusing incoming light toward the retina and the surrounding lens portion for mounting the lens within the capsular bag. A surface roughness disposed on the surrounding lens portion is provided for reducing the glare due to non-focused light directed toward the retina from the intraocular lens with the roughness having a roughness level of between about Ra 45 and about Ra 350.

Abstract: An intraocular lens for insertion into a capsular bag in order to focus incoming light toward a retina and process for manufacturing thereof along with concomitant reduced glare and improved vision provides for a center lens portion of a lens for focusing incoming light toward the retina and the surrounding lens portion for mounting the lens within the capsular bag. A surface roughness disposed on the surrounding lens portion is provided for reducing the glare due to non-focused light directed toward the retina from the intraocular lens with the roughness having a roughness level of between about Ra 45 and about Ra 350.

Abstract: A method and apparatus for processing interrupts in a computing system include processing for ordering a plurality of interrupts for at least one processor. Such interrupts include system event interrupts, external device interrupts, and may further include power management interrupts, interprocessor interrupts, and/or intraprocessor interrupts. Such processing continues by generating an interrupt enable/disable signal based on the current context of a corresponding processor such that when the processor is performing a particular task which should not be interrupted, an interrupt signal is prevented from being provided to the processor. The processing also includes generating masking information to provide enable/disable masking information regarding each of the plurality of interrupts. As such, the computing system may enable/disable on a per interrupt basis the processing of a given interrupt.

Abstract: A method and apparatus for processing interrupts in a computing system include processing for ordering a plurality of interrupts for at least one processor. Such interrupts include system event interrupts, external device interrupts, and may further include power management interrupts, interprocessor interrupts, and/or intraprocessor interrupts. Such processing continues by generating an interrupt enable/disable signal based on the current context of a corresponding processor such that when the processor is performing a particular task which should not be interrupted, an interrupt signal is prevented from being provided to the processor. The processing also includes generating masking information to provide enable/disable masking information regarding each of the plurality of interrupts. As such, the computing system may enable/disable on a per interrupt basis the processing of a given interrupt.

Abstract: A method and apparatus for processing interrupts in a computing system include processing for ordering a plurality of interrupts for at least one processor. Such interrupts include system event interrupts, external device interrupts, and may further include power management interrupts, interprocessor interrupts, and/or intraprocessor interrupts. Such processing continues by generating an interrupt enable/disable signal based on the current context of a corresponding processor such that when the processor is performing a particular task which should not be interrupted, an interrupt signal is prevented from being provided to the processor. The processing also includes generating masking information to provide enable/disable masking information regarding each of the plurality of interrupts. As such, the computing system may enable/disable on a per interrupt basis the processing of a given interrupt.

Abstract: A method and apparatus for interfacing memory with a bus in a computer system includes processing that begins by receiving a transaction from the bus. The transaction may be a read transaction and/or a write transaction. Upon receiving the transaction, the process continues by validating the received transaction and, when valid, acknowledges its receipt. The processing then continues by storing the physical address, which was included in the received transaction, and the corresponding command in an address/control buffer. The processing continues by retrieving the physical address from the address/control buffer when the transaction is to be processed. The determination of when the transaction is to be processed is based on an ordering within the address/control buffer. The processing then continues by performing the transaction utilizing a first or second memory path based on the physical address, such that a first or second memory is accessed.