Abstract: In order to solve a problem that a calibration period for generating a signal obtained by delaying a core clock in a programmable manner is overhead in initialization, a clock generation circuit generates a plurality of delayed clocks having different phases by delaying a core clock which is an operation clock of a CPU, and selects a resynchronization clock whose phase is later than and closest to a phase of a data strobe signal from among the generated delayed clocks and the core clock.