Patents by Inventor Nha Nguyen

Nha Nguyen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11951612
    Abstract: Soft picking tools for a pick and place robotic system are disclosed. A soft picking tool includes a body made of an integrated piece. The body includes stiff fingers located on a distal end of the body. The body also includes a portion of a soft-walled cavity configured to be deformed by application of a positive or negative pressure in the soft-walled cavity, leading to a motion of the stiff fingers, from a rest position, towards or away from a medial axis of the soft picking tool. The soft picking tool also includes one or more fingertips, where at least one of the stiff fingers includes a fingertip embedded on its distal end. The single-piece design and fingertips enable increased robustness, a reduced footprint, large gripping and spreading forces, and more efficient cluttered and flush grasping.
    Type: Grant
    Filed: July 7, 2023
    Date of Patent: April 9, 2024
    Assignee: XYZ Robotics Global Inc.
    Inventors: Kuan-Ting Yu, Thanh Nha Nguyen
  • Publication number: 20230356415
    Abstract: Soft picking tools for a pick and place robotic system are disclosed. A soft picking tool includes a body made of an integrated piece. The body includes stiff fingers located on a distal end of the body. The body also includes a portion of a soft-walled cavity configured to be deformed by application of a positive or negative pressure in the soft-walled cavity, leading to a motion of the stiff fingers, from a rest position, towards or away from a medial axis of the soft picking tool. The soft picking tool also includes one or more fingertips, where at least one of the stiff fingers includes a fingertip embedded on its distal end. The single-piece design and fingertips enable increased robustness, a reduced footprint, large gripping and spreading forces, and more efficient cluttered and flush grasping.
    Type: Application
    Filed: July 7, 2023
    Publication date: November 9, 2023
    Inventors: Kuan-Ting Yu, Thanh Nha Nguyen
  • Patent number: 11783904
    Abstract: In one example, a method is disclosed of compensating for leakage in an array of analog neural non-volatile memory cells, wherein the array is arranged in rows and columns, wherein each row is coupled to a word line and each column is coupled to a bitline, the method comprising measuring leakage for a column of analog neural non-volatile memory cells coupled to a bitline; storing the measured leakage value; and applying the measured leakage value during a read operation of the column of analog neural non-volatile memory cells to compensate for the leakage.
    Type: Grant
    Filed: June 13, 2022
    Date of Patent: October 10, 2023
    Assignee: SILICON STORAGE TECHNOLOGY, INC.
    Inventors: Hieu Van Tran, Thuan Vu, Stephen Trinh, Stanley Hong, Anh Ly, Steven Lemke, Nha Nguyen, Vipin Tiwari, Nhan Do
  • Publication number: 20220405564
    Abstract: Testing circuitry and methods are disclosed for use with analog neural memory in deep learning artificial neural networks. In one example, a method comprises programming a plurality of analog neural non-volatile memory cells in an array of analog neural non-volatile memory cells to store one of N different values, where N is a number of different levels that can be stored in any of the analog neural non-volatile memory cells; measuring a current drawn by the plurality of analog neural non-volatile memory cells; comparing the measured current to a target value; and identifying the plurality of the analog neural non-volatile memory cells as bad if the difference between the measured value and the target value exceeds a threshold.
    Type: Application
    Filed: August 22, 2022
    Publication date: December 22, 2022
    Inventors: Hieu Van Tran, Thuan Vu, Stephen Trinh, Stanley Hong, Anh Ly, Steven Lemke, Nha Nguyen, Vipin Tiwari, Nhan Do
  • Publication number: 20220398444
    Abstract: Testing circuitry and methods are disclosed for use with analog neural memory in deep learning artificial neural networks. In one example, a method comprises programming an analog neural non-volatile memory cell in an array to a target value representing one of N different values, where N is an integer; verifying that a value stored in the analog neural non-volatile memory cell is within an acceptable window of values around the target value; repeating the programming and verifying for each of the N values; and identifying the analog neural non-volatile memory cell as bad if any of the verifying indicates a value stored in the cell outside of the acceptable window of values around the target value.
    Type: Application
    Filed: August 22, 2022
    Publication date: December 15, 2022
    Inventors: Hieu Van TRAN, Thuan VU, Stephen TRINH, Stanley HONG, Anh LY, Steven LEMKE, Nha NGUYEN, Vipin TIWARI, Nhan DO
  • Publication number: 20220319619
    Abstract: Circuitry and methods are disclosed for compensating for leakage in analog neural memory in deep learning artificial neural networks. In one example, a method is disclosed of compensating for leakage in an array of analog neural non-volatile memory cells, wherein the array is arranged in rows and columns, wherein each row is coupled to a word line and each column is coupled to a bitline, the method comprising measuring leakage for a column of analog neural non-volatile memory cells coupled to a bitline; storing the measured leakage value; and applying the measured leakage value during a read operation of the column of analog neural non-volatile memory cells to compensate for the leakage.
    Type: Application
    Filed: June 13, 2022
    Publication date: October 6, 2022
    Inventors: Hieu Van Tran, Thuan Vu, Stephen Trinh, Stanley Hong, Anh Ly, Steven Lemke, Nha Nguyen, Vipin Tiwari, Nhan Do
  • Publication number: 20220319620
    Abstract: Testing circuitry and methods are disclosed for use with analog neural memory in deep learning artificial neural networks. In one example, a method is disclosed of testing a plurality of non-volatile memory cells in an array of non-volatile memory cells, wherein the array is arranged in rows and columns, wherein each row is coupled to a word line and each column is coupled to a bit line, and wherein each word line is selectively coupled to a row decoder and each bit line is selectively coupled to a column decoder, the method comprising asserting, by the row decoder, all word lines in the array; asserting, by the column decoder, all bit lines in the array; performing a deep programming operation on the array of non-volatile memory cells; and measuring a total current received from the bit lines.
    Type: Application
    Filed: June 15, 2022
    Publication date: October 6, 2022
    Inventors: Hieu Van TRAN, Thuan VU, Stephen TRINH, Stanley HONG, Anh LY, Steven LEMKE, Nha NGUYEN, Vipin TIWARI, Nhan DO
  • Patent number: 11449741
    Abstract: Testing circuitry and methods are disclosed for use with analog neural memory in deep learning artificial neural networks. The analog neural memory comprises one or more arrays of non-volatile memory cells. The testing circuitry and methods can be utilized during sort tests, qualification tests, and other tests to verify programming operations of one or more cells.
    Type: Grant
    Filed: September 12, 2019
    Date of Patent: September 20, 2022
    Assignee: SILICON STORAGE TECHNOLOGY, INC.
    Inventors: Hieu Van Tran, Thuan Vu, Stephen Trinh, Stanley Hong, Anh Ly, Steven Lemke, Nha Nguyen, Vipin Tiwari, Nhan Do
  • Publication number: 20220241962
    Abstract: End effector tool changers for a pick, sort, and place robotic system are disclosed. The end effector tool changer comprises an arm attachment portion, a plurality of engagement mechanisms, wherein each engagement mechanism comprises a first part and a second part, and wherein the first part and the second part of the engagement mechanism are selected from the group consisting of a pin and a pinhole; a robotic arm attachment portion, comprising a first plurality of magnets and a first plurality of first parts of the plurality of engagement mechanisms; and a tool attachment portion, comprising a second plurality of magnets and a second plurality of second parts of the plurality of engagement mechanisms. The end effector tool changer has greater mechanical stability, prevents accidental disconnection of the tool, and prevents unintentional rotation of the tool.
    Type: Application
    Filed: April 15, 2022
    Publication date: August 4, 2022
    Inventors: Thanh Nha Nguyen, Kuan-Ting Yu
  • Patent number: 11393546
    Abstract: Testing circuitry and methods are disclosed for use with analog neural memory in deep learning artificial neural networks. The analog neural memory comprises one or more arrays of non-volatile memory cells. The testing circuitry and methods can be utilized during sort tests, qualification tests, and other tests to verify programming operations of one or more cells.
    Type: Grant
    Filed: September 12, 2019
    Date of Patent: July 19, 2022
    Assignee: SILICON STORAGE TECHNOLOGY, INC.
    Inventors: Hieu Van Tran, Thuan Vu, Stephen Trinh, Stanley Hong, Anh Ly, Steven Lemke, Nha Nguyen, Vipin Tiwari, Nhan Do
  • Publication number: 20210020255
    Abstract: Testing circuitry and methods are disclosed for use with analog neural memory in deep learning artificial neural networks. The analog neural memory comprises one or more arrays of non-volatile memory cells. The testing circuitry and methods can be utilized during sort tests, qualification tests, and other tests to verify programming operations of one or more cells.
    Type: Application
    Filed: September 12, 2019
    Publication date: January 21, 2021
    Inventors: Hieu Van Tran, Thuan Vu, Stephen Trinh, Stanley Hong, Anh Ly, Steven Lemke, Nha Nguyen, Vipin Tiwari, Nhan Do
  • Publication number: 20210019608
    Abstract: Testing circuitry and methods are disclosed for use with analog neural memory in deep learning artificial neural networks. The analog neural memory comprises one or more arrays of non-volatile memory cells. The testing circuitry and methods can be utilized during sort tests, qualification tests, and other tests to verify programming operations of one or more cells.
    Type: Application
    Filed: September 12, 2019
    Publication date: January 21, 2021
    Inventors: Hieu Van Tran, Thuan Vu, Stephen Trinh, Stanley Hong, Anh Ly, Steven Lemke, Nha Nguyen, Vipin Tiwari, Nhan Do
  • Patent number: 5564003
    Abstract: A system for registering applications for use with a graphic user interface which includes providing registration information for the applications. The registration information includes class identifiers and templates. The templates identify object classes. Each of the class identifiers and each of the templates correspond to a particular application, and the system utilizes templates for registering applications and may utilize subprograms belonging to the graphic user interface to register applications. The system further includes initiating subprograms utilized while registering an object class, if the graphic user interface is inactive.
    Type: Grant
    Filed: December 15, 1994
    Date of Patent: October 8, 1996
    Assignee: International Business Machines Corporation
    Inventors: Laura K. Bell, Barbara McKee, Thanh-Nha Nguyen, Keith A. Varga
  • Patent number: 5301321
    Abstract: A method and system for the minimization of conflicting activities with respect to an object stored within a data processing system are disclosed. An object within a data processing system may be the subject of multiple activities by users of that system. A temporary record of all current activities with respect to an object is stored within a state mask which has been established in association with that object. Thereafter, prior to permitting a proposed activity, the state mask is utilized to automatically determine if the proposed activity represents a conflict with an existing activity.
    Type: Grant
    Filed: February 21, 1992
    Date of Patent: April 5, 1994
    Assignee: International Business Machines Corporation
    Inventors: Laura K. Bell, Janis D. Jones, Daniel J. Kardell, Thanh-Nha Nguyen, Keith A. Varga