Patents by Inventor Nhi VO

Nhi VO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11797342
    Abstract: A method and a supporting node (150) for supporting a process scheduling node (110) when scheduling a process to a first execution node (130) of a cluster (120) of execution nodes (130, 140, 150) are disclosed. The supporting node (150) receives (A140), from the first execution node (130) being selected by the process scheduling node (110) for execution of the process, a request for allocation of one or more HA devices (131, 141, 151). The supporting node (150) allocates at least one HA device (141), being associated with a second execution node (140) of the cluster (120), to the first execution node (130). The supporting node (150) reduces a value representing number of HA devices (131, 141, 151) available for allocation to the first execution node (130) while taking said at least one HA device (141) into account. The supporting node (150) sends the value to the first execution node (130).
    Type: Grant
    Filed: June 20, 2018
    Date of Patent: October 24, 2023
    Assignee: TELEFONAKTIEBOLAGET LM ERICSSON (PUBL)
    Inventors: Chakri Padala, Nhi Vo, Mozhgan Mahloo, Joao Monteiro Soares
  • Patent number: 11340949
    Abstract: A method and a hardware acceleration managing node for managing a request for hardware acceleration (HA). The hardware acceleration managing node receives, from a HA interfacing node, the request for hardware acceleration of processing of source data. The hardware acceleration managing node sends an indication of a source memory location(s) for storing of the source data. The hardware acceleration managing node selects one or more hardware acceleration devices. The hardware acceleration managing node receives a chunk of code to be accelerated. The hardware acceleration managing node sends, to the one hardware acceleration device, a set of acceleration instructions related to the chunk of code and the indication of the source memory location. The hardware acceleration managing node receives an indication of a result memory location indicating result data. The hardware acceleration managing node sends an indication of completed hardware acceleration to the HA interfacing node.
    Type: Grant
    Filed: May 8, 2018
    Date of Patent: May 24, 2022
    Assignee: Telefonaktiebolaget LM Ericsson (publ)
    Inventors: Chakri Padala, Mozhgan Mahloo, Joao Monteiro Soares, Nhi Vo
  • Publication number: 20210173712
    Abstract: A method and a supporting node (150) for supporting a process scheduling node (110) when scheduling a process to a first execution node (130) of a cluster (120) of execution nodes (130, 140, 150) are disclosed. The supporting node (150) receives (A140), from the first execution node (130) being selected by the process scheduling node (110) for execution of the process, a request for allocation of one or more HA devices (131, 141, 151). The supporting node (150) allocates at least one HA device (141), being associated with a second execution node (140) of the cluster (120), to the first execution node (130). The supporting node (150) reduces a value representing number of HA devices (131, 141, 151) available for allocation to the first execution node (130) while taking said at least one HA device (141) into account. The supporting node (150) sends the value to the first execution node (130).
    Type: Application
    Filed: June 20, 2018
    Publication date: June 10, 2021
    Applicant: Telefonaktieboiaget LM Ericsson (publ)
    Inventors: Chakri PADALA, Nhi VO, Mozhgan MAHLOO, Joao MONTEIRO SOARES
  • Publication number: 20210055971
    Abstract: A method and a hardware acceleration managing node for managing a request for hardware acceleration (HA). The hardware acceleration managing node receives, from a HA interfacing node, the request for hardware acceleration of processing of source data. The hardware acceleration managing node sends an indication of a source memory location(s) for storing of the source data. The hardware acceleration managing node selects one or more hardware acceleration devices. The hardware acceleration managing node receives a chunk of code to be accelerated. The hardware acceleration managing node sends, to the one hardware acceleration device, a set of acceleration instructions related to the chunk of code and the indication of the source memory location. The hardware acceleration managing node receives an indication of a result memory location indicating result data. The hardware acceleration managing node sends an indication of completed hardware acceleration to the HA interfacing node.
    Type: Application
    Filed: May 8, 2018
    Publication date: February 25, 2021
    Applicant: Telefonaktiebolaget LM Ericsson (publ)
    Inventors: Chakri PADALA, Mozhgan MAHLOO, Joao MONTEIRO SOARES, Nhi VO