Patents by Inventor Nicholas Biunno

Nicholas Biunno has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8059423
    Abstract: A multi-layered circuit board is provided having a buried capacitive layer and a device-specific embedded, localized, non-discrete, and distributive capacitive element. A printed circuit board is provided including (1) a first dielectric layer, (2) a first conductive layer coupled to a first surface of the first dielectric layer, (3) a second conductive layer coupled to a second surface of the first dielectric layer, and (4) a localized distributive non-discrete capacitive element adjacent the first conductive layer, wherein the capacitive element occupies a region that approximately coincides with a location over which a device to be coupled to the capacitive element is to be mounted. The embedded, localized, non-discrete, and distributive capacitive element may provide device-specific capacitance to suppress voltage/current noise for a particular device.
    Type: Grant
    Filed: February 6, 2007
    Date of Patent: November 15, 2011
    Assignee: Sanmina-Sci Corporation
    Inventor: Nicholas Biunno
  • Publication number: 20080273311
    Abstract: A multi-layered circuit board is provided having a buried capacitive layer and a device-specific embedded, localized, non-discrete, and distributive capacitive element. A printed circuit board is provided including (1) a first dielectric layer, (2) a first conductive layer coupled to a first surface of the first dielectric layer, (3) a second conductive layer coupled to a second surface of the first dielectric layer, and (4) a localized distributive non-discrete capacitive element adjacent the first conductive layer, wherein the capacitive element occupies a region that approximately coincides with a location over which a device to be coupled to the capacitive element is to be mounted. The embedded, localized, non-discrete, and distributive capacitive element may provide device-specific capacitance to suppress voltage/current noise for a particular device.
    Type: Application
    Filed: February 6, 2007
    Publication date: November 6, 2008
    Inventor: Nicholas Biunno
  • Patent number: 7329831
    Abstract: Improved systems and methods for laser trimming resistors printed on a substrate layer are provided. An exemplary embodiment measures a resistance value for each annular resistor and sorts the annular resistors into one or more bins based on the measured resistance values and target resistance values associated with each resistor. A laser trim file may then be assigned to each bin based on a predictive trim formulation, where each laser trim file defines a set of configuration parameters for a laser drill to conform each resistor with their respective target value. The laser drill uses the laser trim files to trim the resistors within each bin in accordance with the laser trim file assigned to that bin.
    Type: Grant
    Filed: March 29, 2005
    Date of Patent: February 12, 2008
    Assignee: HADCO Santa Clara, Inc.
    Inventors: Nicholas Biunno, Atul Patel, Ken Ogle, George Dudnikov
  • Patent number: 7297896
    Abstract: Improved systems and methods for laser trimming resistors are provided. An exemplary embodiment measures a resistance value for each resistor and sorts the resistors into one or more bins based on the measured resistance values and target resistance values associated with each resistor. A laser trim file may then be assigned to each bin based on a predictive trim formulation, where each laser trim file defines a set of configuration parameters for a laser drill to conform each resistor with their respective target value. The laser drill uses the laser trim files to trim the resistors within each bin in accordance with the laser trim file assigned to that bin.
    Type: Grant
    Filed: October 19, 2005
    Date of Patent: November 20, 2007
    Assignee: HADCO Santa Clara, Inc.
    Inventors: Nicholas Biunno, Atul Patel, Ken Ogle, George Dudnikov
  • Publication number: 20060213882
    Abstract: Improved systems and methods for laser trimming resistors are provided. An exemplary embodiment measures a resistance value for each resistor and sorts the resistors into one or more bins based on the measured resistance values and target resistance values associated with each resistor. A laser trim file may then be assigned to each bin based on a predictive trim formulation, where each laser trim file defines a set of configuration parameters for a laser drill to conform each resistor with their respective target value. The laser drill uses the laser trim files to trim the resistors within each bin in accordance with the laser trim file assigned to that bin.
    Type: Application
    Filed: October 19, 2005
    Publication date: September 28, 2006
    Inventors: Nicholas Biunno, Atul Patel, Ken Ogle, George Dudnikov
  • Patent number: 6972391
    Abstract: Improved systems and methods for laser trimming annular resistors printed on a circuit board are provided. An exemplary embodiment measures a resistance value for each annular resistor and sorts the annular resistors into one or more bins based on the measured resistance values and target resistance values associated with each annular resistor. A laser trim file may then be assigned to each bin based on a predictive trim formulation, where each laser trim file defines a set of configuration parameters for a laser drill to conform each annular resistor with their respective target value. The laser drill uses laser trim files to trim the annular resistors within each bin in accordance with a laser trim file assigned to that bin.
    Type: Grant
    Filed: November 21, 2002
    Date of Patent: December 6, 2005
    Assignee: HADCO Santa Clara, Inc.
    Inventors: Nicholas Biunno, Atul Patel, Ken Ogle, George Dudnikov
  • Patent number: 6940038
    Abstract: Improved systems and methods for laser trimming resistors printed on a substrate layer are provided. An exemplary embodiment measures a resistance value for each annular resistor and sorts the annular resistors into one or more bins based on the measured resistance values and target resistance values associated with each resistor. A laser trim file may then be assigned to each bin based on a predictive trim formulation, where each laser trim file defines a set of configuration parameters for a laser drill to conform each resistor with their respective target value. The laser drill uses the laser trim files to trim the resistors within each bin in accordance with the laser trim file assigned to that bin.
    Type: Grant
    Filed: June 3, 2003
    Date of Patent: September 6, 2005
    Assignee: Sanmina-SCI Corporation
    Inventors: Nicholas Biunno, Atul Patel, Ken Ogle, George Dudnikov
  • Publication number: 20050168318
    Abstract: Improved systems and methods for laser trimming resistors printed on a substrate layer are provided. An exemplary embodiment measures a resistance value for each annular resistor and sorts the annular resistors into one or more bins based on the measured resistance values and target resistance values associated with each resistor. A laser trim file may then be assigned to each bin based on a predictive trim formulation, where each laser trim file defines a set of configuration parameters for a laser drill to conform each resistor with their respective target value. The laser drill uses the laser trim files to trim the resistors within each bin in accordance with the laser trim file assigned to that bin.
    Type: Application
    Filed: March 29, 2005
    Publication date: August 4, 2005
    Inventors: Nicholas Biunno, Atul Patel, Ken Ogle, George Dudnikov
  • Publication number: 20040099647
    Abstract: Improved systems and methods for laser trimming resistors printed on a substrate layer are provided. An exemplary embodiment measures a resistance value for each annular resistor and sorts the annular resistors into one or more bins based on the measured resistance values and target resistance values associated with each resistor. A laser trim file may then be assigned to each bin based on a predictive trim formulation, where each laser trim file defines a set of configuration parameters for a laser drill to conform each resistor with their respective target value. The laser drill uses the laser trim files to trim the resistors within each bin in accordance with the laser trim file assigned to that bin.
    Type: Application
    Filed: June 3, 2003
    Publication date: May 27, 2004
    Inventors: Nicholas Biunno, Atul Patel, Ken Ogle, George Dudnikov
  • Publication number: 20040099646
    Abstract: Improved systems and methods for laser trimming annular resistors printed on a circuit board are provided. An exemplary embodiment measures a resistance value for each annular resistor and sorts the annular resistors into one or more bins based on the measured resistance values and target resistance values associated with each annular resistor. A laser trim file may then be assigned to each bin based on a predictive trim formulation, where each laser trim file defines a set of configuration parameters for a laser drill to conform each annular resistor with their respective target value. The laser drill uses the laser trim files to trim the annular resistors within each bin in accordance with the laser trim file assigned to that bin.
    Type: Application
    Filed: November 21, 2002
    Publication date: May 27, 2004
    Inventors: Nicholas Biunno, Atul Patel, Ken Ogle, George Dudnikov
  • Patent number: 6282782
    Abstract: A method of forming a subassembly for use in a printed circuit board is described. This method includes providing a subassembly including a circuit board layer laminated to two sheets of conductive material with two intermediate sheets of prepreg material, forming a via in the assembly, plating the via, filling the via with a plug material in a volatile solvent, evaporating the volatile solvent, and curing the plug material. Also described is a method of forming a partially filled via in a circuit board layer and a method of forming a thermally conductive plug in a circuit board layer for the transfer of thermal energy from one surface of the circuit board to the other.
    Type: Grant
    Filed: September 2, 1999
    Date of Patent: September 4, 2001
    Assignee: Hadco Santa Clara, Inc.
    Inventors: Nicholas Biunno, Scott Bryan, Mason Hu
  • Patent number: 6276055
    Abstract: A method of forming one or more plugs in a circuit board layer is described which includes providing the circuit board layer, the circuit board layer having a first surface, a second surface, and defining a via containing a plug material in a volatile solvent, evaporating the volatile solvent, and curing the plug material. A product made according to the above method is also described.
    Type: Grant
    Filed: September 24, 1998
    Date of Patent: August 21, 2001
    Assignee: Hadco Santa Clara, Inc.
    Inventors: Scott K. Bryan, Nicholas Biunno
  • Patent number: 5708569
    Abstract: A circuit component assembly and a method for forming the assembly as an annular body in a laminate, preferably between a trough-hole or via and a surrounding conductive layer in a PCB are disclosed, the circuit component assembly including one or more resistors/conductors, inductors and dielectrics/capacitors or combinations thereof, outer and inner peripheries of the circuit component preferably having substantially constant radii permitting simple determination of operative electrical characteristics for the circuit component from (a) the inner and outer radii, (b) an effective thickness for the circuit component and (c) its electrical characteristics determined by the material formed in the annular recess, the circuit component body preferably being formed from a liquid precursor forming conductive interconnections for the circuit component assembly at its outer and inner perimeters.
    Type: Grant
    Filed: July 8, 1996
    Date of Patent: January 13, 1998
    Assignee: Zycon Corporation
    Inventors: James R. Howard, Gregory L. Lucas, Scott K. Bryan, Jin S. Choe, Nicholas Biunno
  • Patent number: 5603847
    Abstract: A circuit component assembly and a method for forming the assembly as an annular body in a laminate, preferably between a trough-hole or via and a surrounding conductive layer in a PCB are disclosed, the circuit component assembly including one or more resistors/conductors, inductors and dielectrics/capacitors or combinations thereof, outer and inner peripheries of the circuit component preferably having substantially constant radii permitting simple determination of operative electrical characteristics for the circuit component from (a) the inner and outer radii, (b) an effective thickness for the circuit component and (c) its electrical characteristics determined by the material formed in the annular recess, the circuit component body preferably being formed from a liquid precursor forming conductive interconnections for the circuit component assembly at its outer and inner perimeters.
    Type: Grant
    Filed: April 5, 1994
    Date of Patent: February 18, 1997
    Assignee: Zycon Corporation
    Inventors: James R. Howard, Gregory L. Lucas, Scott K. Bryan, Jin S. Choe, Nicholas Biunno